It's a simple verilog based MIPS microarchitecture hardware design.
-
Updated
Jul 1, 2021 - SystemVerilog
#
mips-isa
Here are 3 public repositories matching this topic...
Computer Organization and Architecture Coursework
-
Updated
Aug 17, 2020 - HTML
Custom 32-bit MIPS processor implemented in VHDL. Features a single-cycle datapath with standard ISA support, extended with custom architectural modifications for advanced memory operations (lw_incr, lwr), complex conditional branches, and dynamic jumps.
-
Updated
Mar 6, 2026 - VHDL
Improve this page
Add a description, image, and links to the mips-isa topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the mips-isa topic, visit your repo's landing page and select "manage topics."