Fixes the bug of unexpected stall cycles during prologue.

fu/flexible/FlexibleFuRTL.py

@@ -116,10 +116,6 @@ def comb_logic():
 
         # opt connection.
         s.fu[i].recv_opt.msg @= s.recv_opt.msg
-        # Sets each FU's op code as NAH when prologue execution is not completed.
-        # As they are supposed to do nothing during that prologue cycles.
-        if s.prologue_count_inport != 0:
-          s.fu[i].recv_opt.msg.operation @= OPT_NAH
         s.fu[i].recv_opt.val @= s.recv_opt.val
         s.fu_recv_opt_rdy_vector[i] @= s.fu[i].recv_opt.rdy
 

mem/ctrl/CtrlMemDynamicRTL.py

@@ -88,7 +88,6 @@ def construct(s, IntraCgraPktType,
         [[Wire(PrologueCountType) for _ in range(num_routing_xbar_inports)] for _ in range(ctrl_mem_size)]
 
     # Connections.
-    s.send_ctrl.msg //= s.reg_file.rdata[0]
     s.recv_pkt_from_controller //= s.recv_pkt_from_controller_queue.recv
     s.recv_from_element //= s.recv_from_element_queue.recv
 
@@ -193,7 +192,7 @@ def update_send_pkt_to_controller():
             s.send_pkt_to_controller.val @= 1
 
     @update
-    def update_send_ctrl():
+    def update_send_ctrl_val():
       s.send_ctrl.val @= 0
       if s.start_iterate_ctrl == b1(1):
         if s.sent_complete:
@@ -207,6 +206,26 @@ def update_send_ctrl():
           (s.recv_pkt_from_controller_queue.send.msg.payload.cmd == CMD_TERMINATE):
         s.send_ctrl.val @= b1(0)
 
+    @update
+    def update_send_ctrl_msg():
+      for i in range(num_fu_inports):
+        s.send_ctrl.msg.fu_in[i]            @= s.reg_file.rdata[0].fu_in[i]
+        s.send_ctrl.msg.write_reg_from[i]   @= s.reg_file.rdata[0].write_reg_from[i]
+        s.send_ctrl.msg.write_reg_idx[i]    @= s.reg_file.rdata[0].write_reg_idx[i]
+        s.send_ctrl.msg.read_reg_towards[i] @= s.reg_file.rdata[0].read_reg_towards[i]
+        s.send_ctrl.msg.read_reg_idx[i]     @= s.reg_file.rdata[0].read_reg_idx[i]
+      for i in range(num_routing_outports):
+        s.send_ctrl.msg.routing_xbar_outport[i] @= s.reg_file.rdata[0].routing_xbar_outport[i]
+        s.send_ctrl.msg.fu_xbar_outport[i]      @= s.reg_file.rdata[0].fu_xbar_outport[i]
+      s.send_ctrl.msg.vector_factor_power @= s.reg_file.rdata[0].vector_factor_power
+      s.send_ctrl.msg.is_last_ctrl        @= s.reg_file.rdata[0].is_last_ctrl
+      # Sets each FU's op code as NAH when prologue execution has not completed.
+      # As FU is supposed to do nothing during prologue.
+      if s.prologue_count_outport_fu != 0:
+        s.send_ctrl.msg.operation @= OPT_NAH
+      else:
+        s.send_ctrl.msg.operation @= s.reg_file.rdata[0].operation
+
     @update_ff
     def update_whether_we_can_iterate_ctrl():
       if s.reset:

noc/CrossbarRTL.py

@@ -89,8 +89,8 @@ def construct(s,
 
     # Prologue-related wires and registers, which are used to indicate
     # whether the prologue steps have already been satisfied.
-    s.prologue_allowing_vector = Wire(num_outports)
-    s.recv_valid_or_prologue_allowing_vector = Wire(num_outports)
+    s.during_prologue_allowing_vector = Wire(num_outports)
+    s.recv_valid_or_during_prologue_allowing_vector = Wire(num_outports)
     s.prologue_counter = [[Wire(PrologueCountType) for _ in range(num_inports)] for _ in range(ctrl_mem_size)]
     s.prologue_counter_next = [[Wire(PrologueCountType) for _ in range(num_inports)] for _ in range(ctrl_mem_size)]
     s.prologue_count_inport = [[InPort(PrologueCountType) for _ in range(num_inports)] for _ in range(ctrl_mem_size)]
@@ -144,7 +144,7 @@ def update_signal():
             s.send_data[i].msg.predicate @= s.recv_data_msg[s.in_dir_local[i]].predicate
 
         s.recv_opt.rdy @= s.all_send_accepted & \
-                          reduce_and(s.recv_valid_or_prologue_allowing_vector)
+                          reduce_and(s.recv_valid_or_during_prologue_allowing_vector)
 
     @update_ff
     def update_prologue_counter():
@@ -199,22 +199,22 @@ def update_send_accepted_next():
 
     @update
     def update_prologue_allowing_vector():
-      s.prologue_allowing_vector @= 0
+      s.during_prologue_allowing_vector @= 0
       for i in range(num_outports):
         if s.in_dir[i] > 0:
           # Records whether the prologue steps have already been satisfied.
-          s.prologue_allowing_vector[i] @= \
+          s.during_prologue_allowing_vector[i] @= \
             (s.prologue_counter[s.ctrl_addr_inport][s.in_dir_local[i]] < \
              s.prologue_count_wire[s.ctrl_addr_inport][s.in_dir_local[i]])
         else:
-          s.prologue_allowing_vector[i] @= 1
+          s.during_prologue_allowing_vector[i] @= 0
 
     @update
     def update_prologue_or_valid_vector():
-      s.recv_valid_or_prologue_allowing_vector @= 0
+      s.recv_valid_or_during_prologue_allowing_vector @= 0
       for i in range(num_outports):
-        s.recv_valid_or_prologue_allowing_vector[i] @= \
-            s.recv_valid_vector[i] | s.prologue_allowing_vector[i]
+        s.recv_valid_or_during_prologue_allowing_vector[i] @= \
+            s.recv_valid_vector[i] | s.during_prologue_allowing_vector[i]
 
     @update
     def update_in_dir_vector():
@@ -232,9 +232,9 @@ def update_in_dir_vector():
     def update_rdy_vector():
       s.send_rdy_vector @= 0
       for i in range(num_outports):
-        # The `num_inports` indicates the number of outports that go to other tiles.
+        # The `outport_towards_local_base_id` indicates the number of outports that go to other tiles.
         # Specifically, if the compute already done, we shouldn't care the ones
-        # (i.e., i >= num_inports) go to the FU's inports. In other words, we skip
+        # (i.e., i >= outport_towards_local_base_id) go to the FU's inports. In other words, we skip
         # the rdy checking on the FU's inports (connecting from crossbar_outport) if
         # the compute is already completed.
         if (s.in_dir[i] > 0) & \
@@ -259,7 +259,8 @@ def update_recv_required_vector():
 
       for i in range(num_outports):
         if s.in_dir[i] > 0:
-          s.recv_required_vector[s.in_dir_local[i]] @= 1
+          # Avoids crossbar mistakenly consume data during prologue.
+          s.recv_required_vector[s.in_dir_local[i]] @= ~s.during_prologue_allowing_vector[i]
 
     @update
     def update_send_required_vector():