Cortex-M backend: Fix conv2d scratch buffer allocation to match CMSIS-NN wrapper dispatch#17766
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🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/17766
Note: Links to docs will display an error until the docs builds have been completed. ❌ 1 New Failure, 1 Pending, 1 Unrelated FailureAs of commit 94cbb57 with merge base 6c02866 ( NEW FAILURE - The following job has failed:
BROKEN TRUNK - The following job failed but were present on the merge base:👉 Rebase onto the `viable/strict` branch to avoid these failures
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This PR needs a
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Merge will be blocked until ARM-software/CMSIS-NN#200 has merged and we can update the CMSIS version. |
Use arm_convolve_wrapper_s8_get_buffer_size instead of arm_convolve_s8_get_buffer_size so the buffer size matches whichever specialized kernel arm_convolve_wrapper_s8 will actually dispatch to at runtime (1x1 fast, 1xN, or general). Also remove the Error::NotFound carve-out that silently proceeded with a null scratch buffer — CMSIS-NN returns ARM_CMSIS_NN_ARG_ERROR when ctx->buf is NULL and a buffer is required, so fail immediately on any allocation error, consistent with the other cortex_m conv ops. Update CMSIS-NN from v7.0.0 to 84303a51fd867c7ddbd23068b7ce930af1b6269d and remove GIT_SHALLOW (incompatible with SHA-based FetchContent pins). Co-authored-by: Claude <noreply@anthropic.com>
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Co-authored-by: Claude <noreply@anthropic.com>
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Failures unrelated. |
…-NN wrapper dispatch (pytorch#17766) ### Summary Use arm_convolve_wrapper_s8_get_buffer_size instead of arm_convolve_s8_get_buffer_size so the buffer size matches whichever specialized kernel arm_convolve_wrapper_s8 will actually dispatch to at runtime (1x1 fast, 1xN, or general). Also remove the Error::NotFound carve-out that silently proceeded with a null scratch buffer — CMSIS-NN returns ARM_CMSIS_NN_ARG_ERROR when ctx->buf is NULL and a buffer is required, so fail immediately on any allocation error, consistent with the other cortex_m conv ops. Update CMSIS-NN from v7.0.0 to 84303a51fd867c7ddbd23068b7ce930af1b6269d and remove GIT_SHALLOW (incompatible with SHA-based FetchContent pins). Fixes pytorch#18044 cc @digantdesai @SS-JIA @freddan80 @per @zingo @oscarandersson8218 @mansnils @Sebastian-Larsson @robell --------- Co-authored-by: Claude <noreply@anthropic.com>
Summary
Use arm_convolve_wrapper_s8_get_buffer_size instead of arm_convolve_s8_get_buffer_size so the buffer size matches whichever specialized kernel arm_convolve_wrapper_s8 will actually dispatch to at runtime (1x1 fast, 1xN, or general).
Also remove the Error::NotFound carve-out that silently proceeded with a null scratch buffer — CMSIS-NN returns ARM_CMSIS_NN_ARG_ERROR when ctx->buf is NULL and a buffer is required, so fail immediately on any allocation error, consistent with the other cortex_m conv ops.
Update CMSIS-NN from v7.0.0 to 84303a51fd867c7ddbd23068b7ce930af1b6269d
and remove GIT_SHALLOW (incompatible with SHA-based FetchContent pins).
Fixes #18044
cc @digantdesai @SS-JIA @freddan80 @per @zingo @oscarandersson8218 @mansnils @Sebastian-Larsson @robell