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Merge pull request #1240 from diffblue/systemverilog-dot-asteric Build and Test HW-CBMC #5459: Commit ba64eb9 pushed by tautschnig
18m 24s main
main
18m 24s
Merge pull request #1514 from diffblue/wire_with_assignment1 Build and Test HW-CBMC #5458: Commit 92943f8 pushed by tautschnig
6m 10s main
main
6m 10s
Merge pull request #1515 from diffblue/checker7 Build and Test HW-CBMC #5457: Commit 27d3f47 pushed by tautschnig
6m 38s main
main
6m 38s
Merge pull request #1516 from diffblue/smv-integer_number Build and Test HW-CBMC #5456: Commit 0191529 pushed by tautschnig
7m 23s main
main
7m 23s
ebmc language interface implementation for Verilog Build and Test HW-CBMC #5455: Commit 747ed9a pushed by kroening
6m 18s main
main
6m 18s
ebmc language interface implementation for Verilog Build and Test HW-CBMC #5454: Pull request #1454 synchronize by kroening
6m 39s verilog-language-api
verilog-language-api
6m 39s
cmdlinet in ebmc_languaget can be const Build and Test HW-CBMC #5453: Pull request #1517 opened by kroening
6m 12s ebmc_language_api
ebmc_language_api
6m 12s
ebmc language interface implementation for Verilog Build and Test HW-CBMC #5452: Pull request #1454 synchronize by kroening
6m 54s verilog-language-api
verilog-language-api
6m 54s
SMV: integer_number nonterminal Build and Test HW-CBMC #5451: Pull request #1516 opened by kroening
6m 27s smv-integer_number
smv-integer_number
6m 27s
SystemVerilog: fix for checkers with multiple ports Build and Test HW-CBMC #5450: Pull request #1515 synchronize by kroening
7m 8s checker7
checker7
7m 8s
SystemVerilog: fix for checkers with multiple ports Build and Test HW-CBMC #5449: Pull request #1515 opened by kroening
2m 25s checker7
checker7
2m 25s
bump CBMC dependency to release 6.8.0 Build and Test HW-CBMC #5448: Pull request #1364 synchronize by kroening
18m 26s bump-cbmc
bump-cbmc
18m 26s
SMV: union operator Build and Test HW-CBMC #5447: Pull request #1186 synchronize by kroening
3m 17s smv-union
smv-union
3m 17s
Grammar for SystemVerilog .* wildcard port connections Build and Test HW-CBMC #5446: Pull request #1240 synchronize by kroening
18m 46s systemverilog-dot-asteric
systemverilog-dot-asteric
18m 46s
Verilog: assignment to 1-bit LHSs require truncation Build and Test HW-CBMC #5445: Pull request #1514 opened by kroening
6m 40s wire_with_assignment1
wire_with_assignment1
6m 40s
Merge pull request #1513 from diffblue/implicit_declaration1-fix Build and Test HW-CBMC #5444: Commit 918ef6d pushed by tautschnig
6m 12s main
main
6m 12s
Merge pull request #1512 from diffblue/implicit_declaration1 Build and Test HW-CBMC #5443: Commit d539aa9 pushed by tautschnig
6m 40s main
main
6m 40s
Bugfix: type of implicit nets Build and Test HW-CBMC #5442: Pull request #1513 synchronize by kroening
12m 24s implicit_declaration1-fix
implicit_declaration1-fix
12m 24s
Bugfix: type of implicit nets Build and Test HW-CBMC #5441: Pull request #1513 opened by kroening
6m 44s implicit_declaration1-fix
implicit_declaration1-fix
6m 44s
KNOWNBUG test for type of implicit net Build and Test HW-CBMC #5440: Pull request #1512 synchronize by kroening
6m 40s implicit_declaration1
implicit_declaration1
6m 40s
Merge pull request #1510 from diffblue/smv_set_type Build and Test HW-CBMC #5439: Commit 106dac2 pushed by tautschnig
6m 38s main
main
6m 38s
Merge pull request #1511 from diffblue/smv-typecheck-hoist-recursion Build and Test HW-CBMC #5438: Commit 3ccc28f pushed by tautschnig
6m 34s main
main
6m 34s
KNOWNBUG test for type of implicit net Build and Test HW-CBMC #5437: Pull request #1512 opened by kroening
6m 23s implicit_declaration1
implicit_declaration1
6m 23s
Grammar for SystemVerilog .* wildcard port connections Build and Test HW-CBMC #5436: Pull request #1240 synchronize by kroening
18m 35s systemverilog-dot-asteric
systemverilog-dot-asteric
18m 35s
Grammar for SystemVerilog .* wildcard port connections Build and Test HW-CBMC #5435: Pull request #1240 synchronize by kroening
17m 13s systemverilog-dot-asteric
systemverilog-dot-asteric
17m 13s