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SystemVerilog: fix for checkers with multiple ports#1515

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tautschnig merged 1 commit intomainfrom
checker7
Dec 24, 2025
Merged

SystemVerilog: fix for checkers with multiple ports#1515
tautschnig merged 1 commit intomainfrom
checker7

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@kroening
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This fixes the grammar for checker declarations with multiple ports.

@kroening kroening marked this pull request as ready for review December 23, 2025 17:16
This fixes the grammar for checker declarations with multiple ports.
@tautschnig tautschnig merged commit 27d3f47 into main Dec 24, 2025
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@tautschnig tautschnig deleted the checker7 branch December 24, 2025 00:28
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2 participants