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transformations: (riscv-lower-parallel-mov) fix some lint errors#5527

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superlopuh merged 2 commits intomainfrom
sasha/riscv/lint-errors
Jan 6, 2026
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transformations: (riscv-lower-parallel-mov) fix some lint errors#5527
superlopuh merged 2 commits intomainfrom
sasha/riscv/lint-errors

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@anominos I had some weird linting errors locally that weren't on the CI, so I thought I'd lint them, and got a little carried away. This PR contains:

  1. The linting fix, which involved splitting out src and dst used in one loop from src_type and dst_type used in another loop. The current approach of using src and dst for both the values and the types confused pyright.
  2. I then took the opportunity to rename the dictionary to src_by_dst_type, which is my preferred dictionary naming approach
  3. I added the VarOpResult annotation to the parallel move op to remove a cast
  4. I added some typed local variables to not have to keep casting things (although I'm not sure how helpful they will be with your upcoming float support)
  5. Some other minor changes I'll comment on in the PR

@anominos please take a look, and let me know if there are things that you don't like, I'm happy to scale it down or split things up.

@superlopuh superlopuh self-assigned this Jan 4, 2026
@superlopuh superlopuh added the transformations Passes, rewrites label Jan 4, 2026
rewriter.insert_op(op3)
return op2, op3
) -> tuple[SSAValue[riscv.IntRegisterType], SSAValue[riscv.IntRegisterType]]:
"""Add swap using xors. returns the new SSAValues."""
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outdated doc string

Comment on lines +26 to +28
op1 = rewriter.insert_op(riscv.XorOp(a, b, rd=a.type))
op2 = rewriter.insert_op(riscv.XorOp(op1, b, rd=b.type))
op3 = rewriter.insert_op(riscv.XorOp(op1, op2, rd=a.type))
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insert_op returns the op, can make it a bit more compact and IMO readable

op1 = rewriter.insert_op(riscv.XorOp(a, b, rd=a.type))
op2 = rewriter.insert_op(riscv.XorOp(op1, b, rd=b.type))
op3 = rewriter.insert_op(riscv.XorOp(op1, op2, rd=a.type))
return op2.rd, op3.rd
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might as well only return the new values

rewriter.insert_op(op2)
rewriter.insert_op(op3)
return op2, op3
) -> tuple[SSAValue[riscv.IntRegisterType], SSAValue[riscv.IntRegisterType]]:
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better to add return type annotations as a policy IMO

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codecov Bot commented Jan 4, 2026

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 86.02%. Comparing base (944889f) to head (25c27b6).
⚠️ Report is 233 commits behind head on main.

Additional details and impacted files
@@            Coverage Diff             @@
##             main    #5527      +/-   ##
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+ Coverage   86.00%   86.02%   +0.01%     
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LGTM, I don't really like having a bunch of type casts and I wonder if we can use TypeGuards instead, but I think its fine for now.

# split the current mov
cur_input = op.inputs[idx]
cur_input = srcs[idx]
cur_output = op.outputs[idx]
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Suggested change
cur_output = op.outputs[idx]
cur_output = dsts[idx]

dst_type = src.type
# finish the split mov
# this assert is already checked at start, but is used for type checking
assert isinstance(cur_output.type, riscv.IntRegisterType)
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We can remove this assert after above suggestion

Suggested change
assert isinstance(cur_output.type, riscv.IntRegisterType)

Comment thread xdsl/dialects/riscv.py
name = "riscv.parallel_mov"
inputs = var_operand_def(RISCVRegisterType)
outputs = var_result_def(RISCVRegisterType)
outputs: VarOpResult[RISCVRegisterType] = var_result_def(RISCVRegisterType)
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Does the pyright not resolve this automatically? Do we need to type annotate the other attributes as well?

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Unfortunately not: microsoft/pyright#10516. The thing is that we can assert this for results, as it doesn't make sense to modify them during rewriting, but this isn't the case for operands, as their types can change due to rewriting the operations that produced them.

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Ok, makes sense that we don't want to annotate inputs. How about free_registers?

@superlopuh superlopuh requested a review from anominos January 5, 2026 22:39
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@anominos happy with this?

Comment thread xdsl/dialects/riscv.py
inputs = var_operand_def(RISCVRegisterType)
outputs = var_result_def(RISCVRegisterType)
outputs: VarOpResult[RISCVRegisterType] = var_result_def(RISCVRegisterType)
free_registers = opt_prop_def(ArrayAttr[RISCVRegisterType])
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Suggested change
free_registers = opt_prop_def(ArrayAttr[RISCVRegisterType])
free_registers: ArrayAttr[RISCVRegisterType] | None = opt_prop_def(ArrayAttr[RISCVRegisterType])

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This one is not necessary, because it's specifically TypeVars that Pyright cannot infer, the rest of it is fine for now. As Eric said, he might actually remove this functionality in the future, but I'd rather do the code change if it breaks with a future version of pyright instead.

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Ah actually there's no TypeVar there... I'm not sure why, but type inference works already for this definition, so I would still not add it until something breaks.

Comment thread xdsl/dialects/riscv.py
name = "riscv.parallel_mov"
inputs = var_operand_def(RISCVRegisterType)
outputs = var_result_def(RISCVRegisterType)
outputs: VarOpResult[RISCVRegisterType] = var_result_def(RISCVRegisterType)
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Ok, makes sense that we don't want to annotate inputs. How about free_registers?

@superlopuh superlopuh requested a review from anominos January 6, 2026 14:54
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anominos commented Jan 6, 2026

Ok, LGTM

@superlopuh superlopuh merged commit dcbd153 into main Jan 6, 2026
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@superlopuh superlopuh deleted the sasha/riscv/lint-errors branch January 6, 2026 15:43
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