Merge pull request #2158 from verilog-to-routing/map_lookahead_bug_fix

router lookahead: fix criticality multiplication bug

Author: vaughnbetz

comparison_output.xlsx

@@ -80,8 +80,6 @@ static std::vector<int> get_pb_pin_driving_pins(t_physical_tile_type_ptr physica
                                                 int relative_cap,
                                                 const t_pb_graph_pin* pin);
 
-//static std::vector<const t_pb_graph_node*> get_child_pb_graph_node_mode(const t_pb_graph_node* parent_node, int mode_num);
-
 static std::tuple<int, int, int, int> get_pin_index_for_inst(t_physical_tile_type_ptr type, int pin_index, bool is_flat) {
     int max_ptc = get_tile_ipin_opin_max_ptc(type, is_flat);
     VTR_ASSERT(pin_index < max_ptc);
@@ -360,31 +358,6 @@ static std::vector<int> get_pb_pin_driving_pins(t_physical_tile_type_ptr physica
     return driving_pins;
 }
 
-//static std::vector<const t_pb_graph_node*> get_child_pb_graph_node_mode(const t_pb_graph_node* parent_node, int mode_num) {
-//    int num_child_pb_nodes = 0;
-//    std::vector<const t_pb_graph_node*> child_pb_nodes;
-//
-//    if(parent_node->is_primitive())
-//        return child_pb_nodes;
-//
-//    const t_mode& mode = parent_node->pb_type->modes[mode_num];
-//    for(int pb_type_idx = 0; pb_type_idx < mode.num_pb_type_children; pb_type_idx++) {
-//        for(int pb_idx = 0; pb_idx < mode.pb_type_children[pb_type_idx].num_pb; pb_idx++) {
-//            num_child_pb_nodes++;
-//        }
-//    }
-//    child_pb_nodes.resize(num_child_pb_nodes);
-//    int num_added_pb_nodes = 0;
-//    for(int pb_type_idx = 0; pb_type_idx < mode.num_pb_type_children; pb_type_idx++) {
-//        for(int pb_idx = 0; pb_idx < mode.pb_type_children[pb_type_idx].num_pb; pb_idx++) {
-//            child_pb_nodes[num_added_pb_nodes] = &parent_node->child_pb_graph_nodes[mode_num][pb_type_idx][pb_idx];
-//            num_added_pb_nodes++;
-//        }
-//    }
-//    VTR_ASSERT(num_added_pb_nodes == num_child_pb_nodes);
-//    return child_pb_nodes;
-//}
-
 /******************** End Subroutine declarations and definition ************************/
 
 int get_sub_tile_physical_pin(int sub_tile_index,

libs/libarchfpga/src/physical_types_util.cpp

@@ -326,8 +326,8 @@ std::pair<float, float> MapLookahead::get_expected_delay_and_cong(RRNodeId from_
                     wire_cost_entry = get_wire_cost_entry(reachable_wire_inf.wire_rr_type, reachable_wire_inf.wire_seg_index, delta_x, delta_y);
                 }
 
-                float this_delay_cost = (1. - params.criticality) * (reachable_wire_inf.delay + wire_cost_entry.delay);
-                float this_cong_cost = (params.criticality) * (reachable_wire_inf.congestion + wire_cost_entry.congestion);
+                float this_delay_cost = (params.criticality) * (reachable_wire_inf.delay + wire_cost_entry.delay);
+                float this_cong_cost = (1. - params.criticality) * (reachable_wire_inf.congestion + wire_cost_entry.congestion);
 
                 expected_delay_cost = std::min(expected_delay_cost, this_delay_cost);
                 expected_cong_cost = std::min(expected_cong_cost, this_cong_cost);