tests re-arranged

Author: poname

.github/scripts/run-vtr.sh

@@ -9,7 +9,7 @@ export VTR_DIR=$(pwd)
 source $SCRIPT_DIR/hostsetup.sh
 
 if ! { [ $VTR_TEST == "vtr_reg_strong" ] || [ $VTR_TEST == "odin_reg_strong" ] \
-|| [ $VTR_TEST == "vtr_reg_parmys" ]; }; then
+|| [ $VTR_TEST == "parmys_reg_basic" ]; }; then
 	source $SCRIPT_DIR/vtr-full-setup.sh
 fi
 

.github/workflows/test.yml

@@ -39,7 +39,7 @@ jobs:
           - {test: "vtr_reg_strong",             cores: "16", options: "",          cmake: "-DVTR_ASSERT_LEVEL=3",                                         extra_pkgs: "libeigen3-dev"}
           - {test: "vtr_reg_strong_odin",        cores: "16", options: "",          cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON",                          extra_pkgs: "libeigen3-dev"}
           - {test: "vtr_reg_strong_odin",        cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"}
-          - {test: "vtr_reg_parmys",       cores: "16", options: "",          cmake: "-DYOSYS_SV_UHDM_PLUGIN=ON",                                    extra_pkgs: ""}
+          - {test: "vtr_reg_system_verilog",     cores: "16", options: "",          cmake: "-DYOSYS_F4PGA_PLUGINS=ON",                                     extra_pkgs: ""}
           - {test: "odin_reg_strong",            cores: "16", options: "",          cmake: "-DWITH_ODIN=ON",                                               extra_pkgs: ""}
 
     env:
@@ -286,6 +286,29 @@ jobs:
         ./run_reg_test.py ${{ matrix.suite }} -show_failures -j2 -skip_qor
 
 
+  Parmys:
+    name: 'Parmys Basic Test'
+    runs-on: ubuntu-18.04
+    steps:
+
+      - uses: actions/setup-python@v4
+        with:
+          python-version: 3.6
+      - uses: actions/checkout@v3
+      - run: ./.github/scripts/install_dependencies.sh
+
+      - uses: hendrikmuhs/ccache-action@v1.2
+
+      - name: Test
+        env:
+          CMAKE_PARAMS: '-DVTR_IPO_BUILD=off'
+          BUILD_TYPE: debug
+        run: |
+          export PATH="/usr/lib/ccache:/usr/local/opt/ccache/libexec:$PATH"
+          ./.github/scripts/build.sh
+          ./run_reg_test.py parmys_reg_basic -show_failures -j4
+
+
   ODINII:
     name: 'ODIN-II Basic Test'
     runs-on: ubuntu-18.04
@@ -374,6 +397,7 @@ jobs:
       - Warnings
       - Regression
       - Sanitized
+      - Parmys
       - ODINII
       - VQM2BLIF
       - Compatibility

CMakeLists.txt

@@ -55,7 +55,7 @@ option(ODIN_SANITIZE "Enable building odin with sanitize flags" OFF)
 
 # Allow the user to enable building Yosys
 option(WITH_PARMYS "Enable Yosys as elaborator and parmys-plugin as partial mapper" ON)
-option(YOSYS_SV_UHDM_PLUGIN "Enable building and installing Yosys SystemVerilog and UHDM plugins" OFF)
+option(YOSYS_F4PGA_PLUGINS "Enable building and installing Yosys SystemVerilog and UHDM plugins" OFF)
 
 set(VTR_VERSION_MAJOR 8)
 set(VTR_VERSION_MINOR 1)
@@ -432,7 +432,7 @@ if(${WITH_ODIN})
 endif()
 
 # handle cmake params to compile Yosys SystemVerilog/UHDM plugins
-if(${YOSYS_SV_UHDM_PLUGIN})
+if(${YOSYS_F4PGA_PLUGINS})
     # avoid compiling plugins in case the Parmys frontend is not active
     if(NOT ${WITH_PARMYS})
         message(SEND_ERROR "Utilizing SystemVerilog/UHDM plugins requires activating Parmys frontend. Please set WITH_PARMYS.")

README.developers.md

@@ -309,7 +309,7 @@ remote repository, or a PR is created, the [Test Workflow](https://github.com/ve
 will be triggered. The following tests are included in the workflow:
 * [vtr_reg_nightly_test1-3](#vtr_reg_nightly_test1-3)
 * [vtr_reg_strong](#vtr_reg_strong)
-* vtr_reg_parmys
+* parmys_reg_basic
 * odin_reg_strong
 
 instructions on how to gather QoR results of CI runs can be found [here](#example-extracting-qor-data-from-ci-runs).

doc/src/parmys/quickstart.rst

@@ -33,7 +33,7 @@ To build the VTR flow with the Parmys front-end you may use the VTR Makefile wra
 
 .. note::
 
-    Compiling the VTR flow with the ``-DYOSYS_SV_UHDM_PLUGIN=ON`` flag is required to build and install Yosys SystemVerilog and UHDM plugins.
+    Compiling the VTR flow with the ``-DYOSYS_F4PGA_PLUGINS=ON`` flag is required to build and install Yosys SystemVerilog and UHDM plugins.
     Using this compile flag, the `Yosys-F4PGA-Plugins <https://github.com/chipsalliance/yosys-f4pga-plugins>`_ and `Surelog <https://github.com/chipsalliance/Surelog>`_ repositories are cloned in the ``$VTR_ROOT/libs/EXTERNAL`` directory and then will be compiled and added as external plugins to the Parmys front-end.
 
 Basic Usage

doc/src/vtr/run_vtr_flow.rst

@@ -81,7 +81,7 @@ The parser for these runs is considered the Yosys conventional Verilog/SystemVer
 
 Running the default VTR flow using the Parmys standalone front-end.
 The Yosys HDL parser is considered as Yosys-SystemVerilog plugin (i.e., ``read_systemverilog``) and Yosys UHDM plugin (i.e., ``read_uhdm``), respectively.
-Utilizing Yosys plugins requires passing the ``-DYOSYS_SV_UHDM_PLUGIN=ON`` compile flag to build and install the plugins for the Parmys front-end.
+Utilizing Yosys plugins requires passing the ``-DYOSYS_F4PGA_PLUGINS=ON`` compile flag to build and install the plugins for the Parmys front-end.
 
 .. code-block:: bash
 

libs/EXTERNAL/CMakeLists.txt

@@ -20,7 +20,7 @@ endif ()
 # The VTR root CMakeFile initializes the WITH_PARMYS
 if (${WITH_PARMYS})
     # building Surelog and UHDM in a custom target to avoid any target conflict with VTR targets
-    if (${YOSYS_SV_UHDM_PLUGIN})
+    if (${YOSYS_F4PGA_PLUGINS})
         set(SURELOG_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/Surelog)
         set(SURELOG_BINARY_DIR ${SURELOG_SOURCE_DIR}/build)
         set(YOSYS_F4PGA_PLUGINS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/yosys-f4pga-plugins)
@@ -76,7 +76,7 @@ if (${WITH_PARMYS})
                 UHDM_INSTALL_DIR=${CMAKE_BINARY_DIR}
                 BUILD_DIR=${CMAKE_CURRENT_BINARY_DIR}/f4pga-plugins/$(NAME) # NAME will be resolved by yosys-f4pga-plugins Make
                 YOSYS_PATH=${CMAKE_BINARY_DIR}
-                PLUGIN_LIST=systemverilog #fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff
+                PLUGIN_LIST=fasm xdc params sdc ql-iob design_introspection integrateinv ql-qlf systemverilog uhdm dsp-ff
                 install -j${CUSTOM_BUILD_PARALLEL_LEVEL}
 
                 # redirect logs to a logfile