IO Mapped Memory Address Table

Wiki ▸ Hardware Design ▸ IO Mapped Memory Address Table

BAR	Address	Size (Byte)	Dir	Type	Description	Comments
1	00-03	4		Ctrl	reserved	reserved
1	04-0B	8	rw	Ctrl	Global counter[63:0]	(Little Endian)
1	10	1	rw	Ctrl	DMA Status reg	b0:phy1_enable b1:phy2_enable b2:reserve b3:intr_request
1	14-16	3	rw	Ctrl	DMA Buffer Length	Default 1MB,最大4MByte (LE)
1	20-23	4	rw	Ctrl	PHY#1 DMA Start Addr	default 0x10000000 (LE)
1	24-27	4	r	Ctrl	PHY#1 DMA write ptr	Port#1の受信最終アドレス (LE)
1	28-2B	4	rw	Ctrl	PHY#2 DMA Start Addr	default 0x10000000 (LE)
1	2C-2F	4	r	Ctrl	PHY#2 DMA write ptr	Port#2の受信最終アドレス (LE)
1	30-31	2	rw	Ctrl	TX0 write ptr
1	32-33	2	rw	Ctrl	TX1 write ptr
1	34-35	2	r	Ctrl	TX0 read ptr
1	36-37	2	r	Ctrl	TX1 read ptr
1	100-105	6	rw	Ctrl	local time difference 1
1	108-10d	6	rw	Ctrl	local time difference 2
1	110-115	6	rw	Ctrl	local time difference 3
1	118-11d	6	rw	Ctrl	local time difference 4
1	120-125	6	rw	Ctrl	local time difference 5
1	128-12d	6	rw	Ctrl	local time difference 6
1	130-135	6	rw	Ctrl	local time difference 7
2	0000-7FFF	32K	rw	P1TX	Port0 TX frame data
2	0000-0001	2	w	P1TX	length [15:0]	(Little Endian, include FCS)
2	0004-0007	4	w	P1TX	5-tuple hash	(Reserved)
2	0008-000F	8	w	P1TX	counter	(LE)
2	0010-7FFF	<length>	w	P1TX	data	(include FCS)
2	8000-8FFF	32K	rw	P2TX	Port0 TX frame data
2	8000-8001	2	w	P2TX	length [15:0]	(Little Endian, include FCS)
2	8004-8007	4	w	P2TX	5-tuple hash	(Reserved)
2	8008-800F	8	w	P1TX	counter	(LE)
2	8010-FFFF	<length>	w	P2TX	data	(include FCS)