Merge pull request #17 from siliconcompiler/bump_version_0_2_0

petergrossmann21 · web-flow · commit d49a3aeacfd6 · 2025-10-20T15:38:45.000-04:00
Set version 0.2.0
diff --git a/logiklib/__init__.py b/logiklib/__init__.py
@@ -1,4 +1,4 @@
-__version__ = "0.2.0rc2"
+__version__ = "0.2.0"
 
 
 def register_part_data(fpga, package_name, part_name):

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-__version__ = "0.2.0rc2"`
	`1`	`+__version__ = "0.2.0"`
`2`	`2`
`3`	`3`
`4`	`4`	`def register_part_data(fpga, package_name, part_name):`