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hexagon: Add scalar DSP intrinsics#2072

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androm3da wants to merge 1 commit intorust-lang:mainfrom
androm3da:hexagon-scalar-intrinsics
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hexagon: Add scalar DSP intrinsics#2072
androm3da wants to merge 1 commit intorust-lang:mainfrom
androm3da:hexagon-scalar-intrinsics

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@androm3da
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Add scalar (non-HVX) intrinsic wrappers for Hexagon DSP operations covering arithmetic, multiply, shift, saturate, compare, and floating-point instructions, mapping to llvm.hexagon.* LLVM builtins.

Includes the stdarch-gen-hexagon-scalar code generator crate which produces scalar.rs from the LLVM hexagon_protos.h header file, and a CI step to verify the generated output stays in sync.

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rustbot commented Apr 8, 2026

r? @Amanieu

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@androm3da
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cc @quic-mliebel

@quic-mliebel
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Should the scalar intrinsics have cfg_attr like HVX intrinsics have?

For example:

#[cfg_attr(target_arch = "hexagon", target_feature(enable = "hvxv79"))]
#[cfg_attr(test, assert_instr(vfneg_f8))]

The generator could generate those lines.

@androm3da
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Should the scalar intrinsics have cfg_attr like HVX intrinsics have?

For example:

#[cfg_attr(target_arch = "hexagon", target_feature(enable = "hvxv79"))]
#[cfg_attr(test, assert_instr(vfneg_f8))]

The generator could generate those lines.

Some of them do have a dependency, yes. I'll add this.

Add scalar (non-HVX) intrinsic wrappers for Hexagon DSP operations
covering arithmetic, multiply, shift, saturate, compare, and
floating-point instructions, mapping to llvm.hexagon.* LLVM builtins.

Includes the stdarch-gen-hexagon-scalar code generator crate which
produces scalar.rs from the LLVM hexagon_protos.h header file, and a
CI step to verify the generated output stays in sync.
@androm3da androm3da force-pushed the hexagon-scalar-intrinsics branch from b9092c4 to 585b548 Compare April 8, 2026 16:44
@quic-mliebel
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Should the scalar intrinsics have cfg_attr like HVX intrinsics have?
For example:

#[cfg_attr(target_arch = "hexagon", target_feature(enable = "hvxv79"))]
#[cfg_attr(test, assert_instr(vfneg_f8))]

The generator could generate those lines.

Some of them do have a dependency, yes. I'll add this.

What about assert_instr?

@androm3da
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Should the scalar intrinsics have cfg_attr like HVX intrinsics have?
For example:

#[cfg_attr(target_arch = "hexagon", target_feature(enable = "hvxv79"))]
#[cfg_attr(test, assert_instr(vfneg_f8))]

The generator could generate those lines.

Some of them do have a dependency, yes. I'll add this.

What about assert_instr?

yeah - we need that. Will fix it.

And we need target features to gate some of these intrinsic too, I'll fix the compiler to provide those.

@androm3da
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we need target features to gate some of these intrinsic too, I'll fix the compiler to provide those.

rust-lang/rust#155014

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4 participants