Portable SIMD subtree update#155165
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Add basic triagebot configuration
Add `Select` and `ToBytes` to prelude
…r-default docs(simd): fix `load_select_or_default` documentation
- beginners-guide.md: fix missing letter ("within you" → "within your")
- .github/PULL_REQUEST_TEMPLATE.md: remove duplicate word ("tests for test interactions" → "tests for interactions")
Fix typos in documentation
Adds `round_ties_even` using `simd_round_ties_even` intrinsic, matching the scalar `f32::round_ties_even` / `f64::round_ties_even` API. Closes rust-lang/portable-simd#390
Add exhuastive tests for `Mask::first_set` for all masks of size 8.
Apply two optimizations to `Mask::first_set`: 1) Move the call to `simd_cast` into the `const` block when initializing `index`. This removes runtime shuffles necessary to translate a `Simd<usize, N>` to a `Simd<T, N>`. 2) Replace the call to `mask.select` with `simd_or(!self, index)`. This is cheaper than doing a comparison and on some architectures the `or` can be combined with the `not` into a single instruction. See https://godbolt.org/z/YebG6aoMY for an example of the difference in generated assembly.
update `proptest` from `0.10` to `1.0`
Optimize `mask::first_set`
Add round_ties_even to StdFloat trait
bump toolchain to `nightly-2026-03-18`
* Add support for Hexagon HVX Add vendor module and tests for Qualcomm Hexagon HVX (Hexagon Vector eXtension) SIMD support. HVX provides wide vector operations in either 64-byte (512-bit) or 128-byte (1024-bit) mode. Note: u8x128/i8x128 types are not included because portable-simd currently limits lane count to 64 (bitmask operations use u64). In 128-byte HVX mode, u8x64 maps to a half-vector (512-bit). * fixup! Add support for Hexagon HVX fixup! Add support for Hexagon HVX Address reviewer feedback: - Remove hexagon_hvx test file (existing tests suffice with -C flags) - Move HvxVector imports into their respective cfg modules - Change u8x128/i8x128 comment to FIXME for discoverability
* Add `f16` vector support * run `cargo update` * disable `f16` tests on wasm32 with simd128 llvm hangs in that case, see llvm/llvm-project#189251 * Add reference to LLVM issue causing f16 wasm ICE --------- Co-authored-by: Caleb Zulawski <caleb.zulawski@gmail.com>
…m-portable-simd-2026-04-11
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r? @ghost |
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Portable SIMD is developed in its own repository. If possible, consider making this change to rust-lang/portable-simd instead. |
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rustbot has assigned @Mark-Simulacrum. Use Why was this reviewer chosen?The reviewer was selected based on:
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This looks fine actually, there is a small change that should be synchronized the other way but that's not a blocker. @bors r+ |
…-2026-04-11, r=folkertdev Portable SIMD subtree update Let's see if this works (we might need a sync the other way first)
Rollup of 7 pull requests Successful merges: - #155084 (Initial functions to start on transmute v2) - #155126 (add `cfg(target_object_format = "...")`) - #155165 (Portable SIMD subtree update) - #153871 (fix spurious test failure in `metadata_access_times`) - #155150 (replace <name> @ ty::AliasTy matches with just using args: <name>_args) - #155159 (Fix min-specialization ICE from ignored region resolution failure) - #155167 (Reduce size of `ImportData`)
Rollup merge of #155165 - folkertdev:sync-from-portable-simd-2026-04-11, r=folkertdev Portable SIMD subtree update Let's see if this works (we might need a sync the other way first)
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for #155175 @rust-timer build 354fef2 |
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Finished benchmarking commit (354fef2): comparison URL. Overall result: ❌ regressions - no action neededBenchmarking means the PR may be perf-sensitive. It's automatically marked not fit for rolling up. Overriding is possible but disadvised: it risks changing compiler perf. @bors rollup=never Instruction countOur most reliable metric. Used to determine the overall result above. However, even this metric can be noisy.
Max RSS (memory usage)Results (primary -2.5%, secondary -2.7%)A less reliable metric. May be of interest, but not used to determine the overall result above.
CyclesResults (primary -5.9%, secondary 3.7%)A less reliable metric. May be of interest, but not used to determine the overall result above.
Binary sizeThis perf run didn't have relevant results for this metric. Bootstrap: 490.796s -> 491.322s (0.11%) |
Let's see if this works (we might need a sync the other way first)