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Add hybrid Slurm support to rrun with PMIx-based coordination #844
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9611a70
Add hybrid Slurm support to rrun with PMIx-based coordination
pentschev d347ff6
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
pentschev 4516f54
Clarify RAPIDSMPF_ROOT_ADDRESS_FILE unset purpose
pentschev 0fba6e4
Ensure rank 0 has proper signal/log forwarding
pentschev 8635182
Write address to a temporary file first
pentschev 21c56d4
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
pentschev 6bd1324
Error if unable to determine number of tasks/processes
pentschev dee4029
Early check for invalid address
pentschev 71d469d
Clarify start_local_rank intent
pentschev 0c5b25c
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
pentschev d7145ae
Fix build errors
pentschev 5290e23
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
pentschev 2de2b08
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
pentschev cd64521
Update to match UCXX string_view changes
pentschev cc40031
Merge remote-tracking branch 'upstream/main' into rrun-slurm-hybrid
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Can you add some documentation on why I might want to use hybrid launch mode? IIUC it is because then I just need to ensure that I launch the correct number of processes per node and not worry about binding via slurm (the rrun launch takes care of that).
but, one thing I don't understand is why we can't just launch in passthrough mode and then apply bindings to all the processes we get via the rrun topology detection stuff.
What concretely is hybrid mode buying us?
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In passthrough mode we can do that, although in a somewhat limited manner. Take for example CPUs as resources, you have two options:
However, there's a few more reasons why I would like to have hybrid mode:
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Can we not map the cuda runtime device id to its nvml counterpart and therefore determine the physical CPUs to bind to?
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I think no. This is an intentional isolation layer from Slurm (or rather enroot/pyxis) so that only the resources that are actually available to the allocation are seen at runtime, and that includes NVML, so NVML reports a single device being available and you cannot determine the true index or "order" of the device.