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1. Computer-Design-Prototyping Computer-Design-Prototyping Public

   Computer Prototyping project where I designed and implemented a dual-core 5-stage pipelined processor with an L-1 cache hierarchy and an MSI cache coherence protocol which ran on the MIPS ISA.

   SystemVerilog

2. Optimizing-Compilers Optimizing-Compilers Public

   Compilers class where I created and optimized a compiler in C++ using a flex and bison generator.

   C++

3. Simple-Neural-Network-Accelerator Simple-Neural-Network-Accelerator Public

   Project where we conceptualized and designed a simple neural network accelerator, loosely based on the Eyeriss architecture, to accelerate the inference on a database of 10000 images. The trained m…

   Verilog 11 4

4. Map-Reduce-Multi-Threaded Map-Reduce-Multi-Threaded Public

   A Map Reduce algorithm written in C++ that makes use of OpenMP and MPI libraries to massively speedup execution. The algorithm was used to count all occurrences of each word in a directory of files.

   C++ 1

5. Parallel_Computer_Architectures Parallel_Computer_Architectures Public

   Parallel Computer Architecture project at Purdue where I implemented Last-Touch Prediction, a self-invalidation scheme, to a MESI cache/directory coherence protocol in gem5. A 10% average improveme…

   C++ 1

6. gpgpu-sim_distribution gpgpu-sim_distribution Public

   Forked from gpgpu-sim/gpgpu-sim_distribution

   GPGPU-Sim provides a detailed simulation model of a contemporary GPU running CUDA and/or OpenCL workloads and now includes an integrated (and validated) energy model, GPUWattch.

   C++