Prepare qcom-next based on tag 'Linux 7.1-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git#623
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Document the RPM Power Domains on the Shikra Platform. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Shikra has the same RPM power domains as QCM2290. Add shikra support by reusing QCM2290 power domains. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Document the pm8150 compatible string and available regulators in the QCOM SMD RPM regulator documentation. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
The PM8150 is found on boards with shikra SoCs and It provides 10 SMPS and 18 LDO regulators. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Add the rpmpd compatable string for shikra. Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com>
Qualcomm Shikra SoC implements qcom,smmu-500 for adreno-smmu. Document its corresponding compatible. Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
Add "qcom,shikra-apcs-hmss-global" compatibility string in qcom_apcs_ipc mailbox driver to match apcs_glb device node. Signed-off-by: Vishnu Santhosh <vishnu.santhosh@oss.qualcomm.com>
Document compatible string for the QFPROM on Shikra platform. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Add the qcom,shikra-rpm-proc compatible string to the Qualcomm RPM remote processor device tree binding. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Add compatible for the Qualcomm Shikra APCS block to the Qualcomm APCS binding. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Document the compatible for Shikra. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Document the qcom,rpmcc-shikra compatible. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Add support for qcom global clock controller bindings for Shikra platform. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Add support for RPM-managed clocks on the Shikra platform. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Add support for Global clock controller for Shikra Qualcomm SoC. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Enable the GCC driver on the Qualcomm Shikra EVK boards. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Add devicetree binding for watchdog present on Qualcomm's Shikra SoC. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Document the GPI DMA engine on Shikra platform. Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Update dt-bindings to add Shikra to QMP Phy list. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Update dt-bindings to add Shikra to QUSB2 Phy list. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Introduce the compatible definition for Shikra QCOM SNPS DWC3. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Add init sequence and phy configuration for Shikra. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Provide PHY configuration for the USB QMP PHY for Shikra Platform. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
…ect in Shikra SoC Document the RPM Network-On-Chip Interconnect for the Qualcomm Shikra platform. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Add driver for the Qualcomm interconnect buses found in Shikra based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Enable the shikra interconnect driver so that consumers are able to obtain their path handles properly. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Document the qcom,shikra-tcsr compatible. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com>
Document the qcom,shikra-sdhci compatible Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com>
The Qualcomm Shikra SoCs use RIMPS (RISC V based Integrated Manager for Power States) hardware for cpufreq scaling, which is functionally similar to EPSS, but supports only up to 12 frequency lookup table (LUT) entries. Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
The Qualcomm Shikra SoCs uses the RIMPS based hardware for cpufreq scaling. Introduce rimps_soc_data, which reuses the existing EPSS configurations, and accounts for the maximum LUT entries to 12 as per RIMPS hardware. Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
# Conflicts: # arch/arm64/boot/dts/qcom/kaanapali.dtsi
# Conflicts: # arch/arm64/boot/dts/qcom/Makefile
# Conflicts: # arch/arm64/boot/dts/qcom/qcs8300-ride.dts # drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
# Conflicts: # Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml # drivers/misc/fastrpc.c # drivers/remoteproc/qcom_q6v5_pas.c # drivers/soc/qcom/smem.c
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Adding glymur-crd to the QSEECOM allowlist causes qcom_scm to fully initialize at early boot, which sets up uefisecapp and registers EFI variable operations. This makes efi_has_tpm2() succeed by reading the LoaderTpm2ActivePcrBanks EFI variable, satisfying ConditionSecurity=tpm2 in systemd. As a result, systemd activates tpm2.target which unconditionally waits for /dev/tpm0 and /dev/tpmrm0. systemd waits the full 90-second timeout for each of the two TPM device units, pushing total boot time beyond 2 minutes. Revert until TPM driver in place and /dev/tpm0 node is created. This reverts commit 87a1698. Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
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…nable GPIO Add a bt_gpio_required flag to the per-platform data to indicate that a chip's BT enable path requires a dedicated GPIO. Only skip matching the "bluetooth" device node when this flag is set and bt_gpio is absent. Previously the bt_gpio check was applied unconditionally, which caused chips like WCN3990 that have no separate BT/WLAN enable pins by design to fail matching even when bt-enable GPIO is legitimately absent from the DT. Set bt_gpio_required for WCN6855 and WCN7850 which do require a dedicated BT enable GPIO. Signed-off-by: Shuai Zhang <shuai.zhang@oss.qualcomm.com>
Adding merge log file and topic_SHA1 file Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
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Name SHA Commits
tech/bsp/clk a9bb2c2 14
tech/bsp/devfreq a0c2f21 6
tech/bsp/ec 643c24b 2
tech/bsp/soc-infra 6aff3e6 25
tech/bsp/pinctrl 3f1acf8 1
tech/bsp/remoteproc a7b9b6d 10
tech/bus/peripherals 287f0f5 8
tech/bus/pci/all acd6cd0 16
tech/bus/pci/phy aaf8ef1 4
tech/bus/usb/dwc 49ac8e0 2
tech/bus/usb/phy 984aa89 36
tech/debug/hwtracing 25c6a74 30
tech/pmic/misc ee32a8c 5
tech/mem/iommu 1fa98cb 5
tech/mm/audio/all cab3357 10
tech/mm/camss 147ae87 28
tech/mm/drm 2fbdd74 60
tech/mm/fastrpc f5f3138 10
tech/mm/video 8bbe314 36
tech/mm/gpu cee7794 5
tech/net/ath 850c3c0 15
tech/net/phy a3602e9 1
tech/net/bluetooth 9cca493 2
tech/pm/power 2d42c35 9
tech/pm/thermal 3f033cb 7
tech/security/crypto f030676 14
tech/security/ice 1564b82 25
tech/storage/phy cf1667f 1
tech/storage/all e254dae 1
tech/all/dt/qcs6490 da803bf 21
tech/all/dt/qcs9100 bd6adc0 21
tech/all/dt/qcs8300 965645d 20
tech/all/dt/qcs615 195c20d 10
tech/all/dt/agatti c828f10 1
tech/all/dt/hamoa fd53d0e 30
tech/all/dt/glymur 165f40a 28
tech/all/dt/kaanapali 33d3cd7 11
tech/all/dt/pakala fee7c34 8
tech/all/config 6f833a5 64
tech/overlay/dt 8d6e4e9 49
tech/all/workaround 08534d4 19
tech/mproc/all 0aa90b7 3
tech/noup/debug/all cbdd4bb 26
tech/hwe/unoq b2ea57b 5
early/hwe/shikra/drivers a34947d 103
early/hwe/shikra/dt 7aa3e66 75