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FROMLIST: v4: Add explicit clock vote and enable power-domain for QCOM-ICE #388

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FROMLIST: v4: Add explicit clock vote and enable power-domain for QCOM-ICE #388

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56ba217
Revert "dt-bindings: crypto: qcom,ice: Require power-domain and iface…
arakshit011 Mar 24, 2026
1d8ac48
Revert "arm64: dts: qcom: lemans: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
e01af7c
Revert "arm64: dts: qcom: monaco: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
0bdd61d
Revert "arm64: dts: qcom: sc7180: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
54067dc
Revert "arm64: dts: qcom: kodiak: Add power-domain and iface clk for …
arakshit011 Mar 27, 2026
ab31b50
Revert "arm64: dts: qcom: sm8450: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
201cba5
Revert "arm64: dts: qcom: sm8550: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
6fc243a
Revert "arm64: dts: qcom: sm8650: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
981e219
Revert "arm64: dts: qcom: sm8750: Add power-domain and iface clk for …
arakshit011 Mar 24, 2026
4f96f3c
Revert "soc: qcom: ice: Add explicit power-domain and clock voting ca…
arakshit011 Mar 24, 2026
27f1a48
FROMLIST: dt-bindings: crypto: qcom,ice: Fix missing power-domain and…
harshaldev27 Mar 24, 2026
451e32a
FROMLIST: soc: qcom: ice: Allow explicit votes on 'iface' clock for ICE
harshaldev27 Mar 24, 2026
c3dbe73
FROMLIST: arm64: dts: qcom: kaanapali: Add power-domain and iface clk…
harshaldev27 Mar 24, 2026
eb0f019
FROMLIST: arm64: dts: qcom: lemans: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
10b30b9
FROMLIST: arm64: dts: qcom: monaco: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
6636e0f
FROMLIST: arm64: dts: qcom: sc7180: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
bf71004
FROMLIST: arm64: dts: qcom: kodiak: Add power-domain and iface clk fo…
harshaldev27 Mar 27, 2026
5ad8ae4
FROMLIST: arm64: dts: qcom: sm8450: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
782cd99
FROMLIST: arm64: dts: qcom: sm8550: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
9a0e391
FROMLIST: arm64: dts: qcom: sm8650: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
d3326f5
FROMLIST: arm64: dts: qcom: sm8750: Add power-domain and iface clk fo…
harshaldev27 Mar 24, 2026
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31 changes: 26 additions & 5 deletions Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -28,10 +28,14 @@ properties:
maxItems: 1

clocks:
minItems: 1
maxItems: 2

clock-names:
maxItems: 2
minItems: 1
items:
- const: core
- const: iface

power-domains:
maxItems: 1
Expand All @@ -40,11 +44,28 @@ required:
- compatible
- reg
- clocks
- clock-names
- power-domains

additionalProperties: false

allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,eliza-inline-crypto-engine
- qcom,milos-inline-crypto-engine

then:
required:
- power-domains
- clock-names
properties:
clocks:
minItems: 2
clock-names:
minItems: 2

examples:
- |
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
Expand All @@ -55,8 +76,8 @@ examples:
reg = <0x01d88000 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};
...
6 changes: 5 additions & 1 deletion arch/arm64/boot/dts/qcom/kaanapali.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -683,7 +683,11 @@
"qcom,inline-crypto-engine";
reg = <0x0 0x01d88000 0x0 0x18000>;

clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "core",
"iface";
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
};

tcsr_mutex: hwlock@1f40000 {
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/lemans.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2776,8 +2776,8 @@
reg = <0x0 0x01d88000 0x0 0x18000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/monaco.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2664,8 +2664,8 @@
reg = <0x0 0x01d88000 0x0 0x18000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sc7180.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -1601,8 +1601,8 @@
reg = <0 0x01d90000 0 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sc7280.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2581,8 +2581,8 @@
reg = <0 0x01d88000 0 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sm8450.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -5351,8 +5351,8 @@
reg = <0 0x01d88000 0 0x8000>;
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sm8550.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2416,8 +2416,8 @@

clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sm8650.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -4048,8 +4048,8 @@

clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc UFS_PHY_GDSC>;
};

Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/qcom/sm8750.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -2060,8 +2060,8 @@

clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>;
clock-names = "ice_core_clk",
"iface_clk";
clock-names = "core",
"iface";
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
};

Expand Down
17 changes: 5 additions & 12 deletions drivers/soc/qcom/ice.c
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Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,6 @@
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>

#include <linux/firmware/qcom/qcom_scm.h>

Expand Down Expand Up @@ -313,18 +311,15 @@ int qcom_ice_resume(struct qcom_ice *ice)
struct device *dev = ice->dev;
int err;

pm_runtime_get_sync(dev);
err = clk_prepare_enable(ice->core_clk);
if (err) {
dev_err(dev, "failed to enable core clock (%d)\n",
err);
dev_err(dev, "Failed to enable core clock: %d\n", err);
return err;
}

err = clk_prepare_enable(ice->iface_clk);
if (err) {
dev_err(dev, "failed to enable iface clock (%d)\n",
err);
dev_err(dev, "Failed to enable iface clock: %d\n", err);
return err;
}
qcom_ice_hwkm_init(ice);
Expand All @@ -336,7 +331,6 @@ int qcom_ice_suspend(struct qcom_ice *ice)
{
clk_disable_unprepare(ice->iface_clk);
clk_disable_unprepare(ice->core_clk);
pm_runtime_put_sync(ice->dev);
ice->hwkm_init_complete = false;

return 0;
Expand Down Expand Up @@ -592,12 +586,14 @@ static struct qcom_ice *qcom_ice_create(struct device *dev,
engine->core_clk = devm_clk_get_optional_enabled(dev, "ice_core_clk");
if (!engine->core_clk)
engine->core_clk = devm_clk_get_optional_enabled(dev, "ice");
if (!engine->core_clk)
engine->core_clk = devm_clk_get_optional_enabled(dev, "core");
if (!engine->core_clk)
engine->core_clk = devm_clk_get_enabled(dev, NULL);
if (IS_ERR(engine->core_clk))
return ERR_CAST(engine->core_clk);

engine->iface_clk = devm_clk_get_enabled(dev, "iface_clk");
engine->iface_clk = devm_clk_get_optional_enabled(dev, "iface");
if (IS_ERR(engine->iface_clk))
return ERR_CAST(engine->iface_clk);

Expand Down Expand Up @@ -742,9 +738,6 @@ static int qcom_ice_probe(struct platform_device *pdev)
return PTR_ERR(base);
}

devm_pm_runtime_enable(&pdev->dev);
pm_runtime_get_sync(&pdev->dev);

engine = qcom_ice_create(&pdev->dev, base);
if (IS_ERR(engine))
return PTR_ERR(engine);
Expand Down