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18 changes: 18 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -6,13 +6,15 @@
/dts-v1/;

#include "shikra-cqm-som.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
model = "Qualcomm Technologies, Inc. Shikra CQM EVK";
compatible = "qcom,shikra-cqm-evk", "qcom,shikra-cqm-som", "qcom,shikra";
chassis-type = "embedded";

aliases {
mmc1 = &sdhc_2; /* SDC2 SD card slot */
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follow alphabetical order

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updated

serial0 = &uart0;
};

Expand All @@ -21,6 +23,22 @@
};
};

&sdhc_2 {
vmmc-supply = <&pm4125_l21>;
vqmmc-supply = <&pm4125_l4>;

no-sdio;
no-mmc;

pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
pinctrl-names = "default", "sleep";

cd-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;

status = "okay";
};

&uart0 {
status = "okay";
};
18 changes: 18 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -6,13 +6,15 @@
/dts-v1/;

#include "shikra-cqs-som.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
model = "Qualcomm Technologies, Inc. Shikra CQS EVK";
compatible = "qcom,shikra-cqs-evk", "qcom,shikra-cqs-som", "qcom,shikra";
chassis-type = "embedded";

aliases {
mmc1 = &sdhc_2; /* SDC2 SD card slot */
serial0 = &uart0;
};

Expand All @@ -21,6 +23,22 @@
};
};

&sdhc_2 {
vmmc-supply = <&pm4125_l21>;
vqmmc-supply = <&pm4125_l4>;

no-sdio;
no-mmc;

pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
pinctrl-names = "default", "sleep";

cd-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;

status = "okay";
};

&uart0 {
status = "okay";
};
18 changes: 18 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts
Original file line number Diff line number Diff line change
Expand Up @@ -6,13 +6,15 @@
/dts-v1/;

#include "shikra-iqs-som.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
model = "Qualcomm Technologies, Inc. Shikra IQS EVK";
compatible = "qcom,shikra-iqs-evk", "qcom,shikra-iqs-som", "qcom,shikra";
chassis-type = "embedded";

aliases {
mmc1 = &sdhc_2; /* SDC2 SD card slot */
serial0 = &uart0;
};

Expand All @@ -21,6 +23,22 @@
};
};

&sdhc_2 {
vmmc-supply = <&pm8150_l10>;
vqmmc-supply = <&pm8150_l2>;

no-sdio;
no-mmc;

pinctrl-0 = <&sdc2_default &sdc2_card_det_n>;
pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>;
pinctrl-names = "default", "sleep";

cd-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;

status = "okay";
};

&uart0 {
status = "okay";
};
94 changes: 94 additions & 0 deletions arch/arm64/boot/dts/qcom/shikra.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#include <dt-bindings/clock/qcom,shikra-gcc.h>
#include <dt-bindings/interconnect/qcom,rpm-icc.h>
#include <dt-bindings/interconnect/qcom,shikra.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>

Expand Down Expand Up @@ -364,6 +365,53 @@
drive-strength = <2>;
bias-disable;
};

sdc2_default: sdc2-default-state {
clk-pins {
pins = "sdc2_clk";
drive-strength = <14>;
bias-disable;
};

cmd-pins {
pins = "sdc2_cmd";
drive-strength = <14>;
bias-pull-up;
};

data-pins {
pins = "sdc2_data";
drive-strength = <14>;
bias-pull-up;
};
};

sdc2_sleep: sdc2-sleep-state {
clk-pins {
pins = "sdc2_clk";
drive-strength = <2>;
bias-disable;
};

cmd-pins {
pins = "sdc2_cmd";
drive-strength = <2>;
bias-pull-up;
};

data-pins {
pins = "sdc2_data";
drive-strength = <2>;
bias-pull-up;
};
};

sdc2_card_det_n: sd-card-det-n-state {
pins = "gpio89";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};

mem_noc: interconnect@d00000 {
Expand Down Expand Up @@ -482,6 +530,52 @@
reg = <0x0 0x04690000 0x0 0x14000>;
};

sdhc_2: mmc@4784000 {
compatible = "qcom,shikra-sdhci", "qcom,sdhci-msm-v5";
reg = <0x0 0x4784000 0x0 0x1000>;

interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";

bus-width = <4>;
no-sdio;
no-mmc;

clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmcc RPM_SMD_XO_CLK_SRC>;
clock-names = "iface", "core", "xo";

qcom,dll-config = <0x0007442c>;
qcom,ddr-config = <0x80040868>;

iommus = <&apps_smmu 0x0a0 0x0>;

interconnects = <&system_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
<&mem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "sdhc-ddr","cpu-sdhc";
operating-points-v2 = <&sdhc2_opp_table>;

status = "disabled";

sdhc2_opp_table: opp-table-2 {
compatible = "operating-points-v2";

opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmpd_opp_low_svs>;
};

opp-202000000 {
opp-hz = /bits/ 64 <202000000>;
required-opps = <&rpmpd_opp_nom>;
};
};
};

adreno_smmu: iommu@59a0000 {
compatible = "qcom,shikra-smmu-500", "qcom,smmu-500", "arm,mmu-500";
reg = <0x0 0x059a0000 0x0 0x10000>;
Expand Down