scsi: ufs: ufs-qcom: Enable SKIP DEVICE RESET Quirk#1289
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The current devfreq downdifferential threshold of 5% causes overly aggressive frequency downscaling, leading to performance degradation sometimes during sequential read workloads. Update the UFS devfreq downdifferential threshold to 65. This widens the hysteresis window and prevents overly aggressive downscaling, ensuring that frequency is maintained for loads above 5% and scaling down occurs only when utilization falls below this level, while scale-up still triggers above the 70% threshold. Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260122141331.239354-4-nitin.rawat@oss.qualcomm.com/
Set ice clk rate from sdhci msm platform driver, needed for target which are having legacy ice support, and need sdhci msm platform driver to set rate. Link: https://lore.kernel.org/all/20260529081045.2877910-2-ram.gupta@oss.qualcomm.com/ Signed-off-by: Ram Prakash Gupta <ram.gupta@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Add a new host quirk UFSHCD_QUIRK_SKIP_DEVICE_RESET to allow host controller drivers to skip asserting device reset during UFS power down. When RST_N is asserted, the UFS device firmware wakes up and executes its internal reset routine. This routine initializes multiple hardware blocks and causing the device to draw a large curreny during this time. If the power rail transitions to LPM (Low Power Mode) while the device is still drawing this elevated current, it may trigger an OCP (Over Current Protection) fault in the regulator. For some UFS devices (e.g., Micron), the elevated current draw persists until the reset line is deasserted, making a fixed delay insufficient to prevent OCP. This quirk allows such devices to skip device reset during UFS power down. The device reset will instead be asserted as part of the platform shutdown sequence. Link: https://lore.kernel.org/linux-scsi/20260531235011.1052706-2-nitin.rawat@oss.qualcomm.com/ Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
A previous fix [1] addressed an OCP (Over Current Protection) issue during UFS power down (PC=3) by adding a 10ms delay after asserting HWRST. The delay allows the UFS device to complete its reset routine before the power rail transitions to LPM (Low Power Mode). However, this fix is insufficient for certain Micron UFS parts. Unlike other vendors whose reset routine completes within ~10ms, Micron parts continue to draw current beyond the LPM threshold for a longer duration after reset is asserted, specifically until the reset is deasserted (RST_N goes high). No fixed delay can reliably cover this window since there is currently no mechanism for the host to query whether the device reset routine has completed. Enable the UFSHCD_QUIRK_SKIP_DEVICE_RESET quirk to skip device assert reset during UFS power down for Micron parts. For all other vendors, the existing behavior (assert reset + 10ms delay) is preserved. This quirk is applicable only during shutdown. The device reset will be asserted as part of the platform shutdown sequences. [1] commit 5127be4 ("scsi: ufs: ufs-qcom: Fix UFS OCP issue during UFS power down (PC=3)") Link: https://lore.kernel.org/linux-scsi/20260531235011.1052706-3-nitin.rawat@oss.qualcomm.com/ Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
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🔨 Build Failure Analysis — PR #1289PR: #1289
VerdictThis is not a compilation error. The build failed during git merge before compilation started. The merge conflict is in a file ( 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1289PR: #1289
VerdictThis is not a compilation failure. The build failed during the pre-build integration phase due to a merge conflict in 📎 Detailed analysis: Full report |
PR #1289 — validate-patchPR: #1289
Final Summary
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PR #1289 — checker-log-analyzerPR: #1289
Detailed report: Full report
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3 participants
A previous fix [1] addressed an OCP (Over Current Protection) issue
during UFS power down (PC=3) by adding a 10ms delay after asserting
HWRST. The delay allows the UFS device to complete its reset routine
before the power rail transitions to LPM (Low Power Mode).
However, this fix is insufficient for certain Micron UFS parts. Unlike
other vendors whose reset routine completes within ~10ms, Micron parts
continue to draw current beyond the LPM threshold for a longer duration
after reset is asserted, specifically until the reset is deasserted
(RST_N goes high). No fixed delay can reliably cover this window since
there is currently no mechanism for the host to query whether the
device reset routine has completed.
Enable the UFSHCD_QUIRK_SKIP_DEVICE_RESET quirk to skip device assert
reset during UFS power down for Micron parts. For all other vendors,
the existing behavior (assert reset + 10ms delay) is preserved.
This quirk is applicable only during shutdown. The device reset
will be asserted as part of the platform shutdown sequences.
[1] commit 5127be4 ("scsi: ufs: ufs-qcom: Fix UFS OCP issue during
UFS power down (PC=3)")
CRs-Fixed: 4410143