ASoC: qcom: Add QAIF support for Shikra platform

Documentation/devicetree/bindings/sound/qcom,shikra-qaif.yaml

@@ -0,0 +1,126 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/qcom,shikra-qaif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Audio Interface on Shikra
+
+maintainers:
+  - Qualcomm Innovation Center, Inc. <quic_kernel@quicinc.com>
+
+description:
+  Qualcomm Audio Interface CPU DAI controller used by the Shikra audio core.
+
+properties:
+  compatible:
+    const: qcom,shikra-qaif-cpu
+
+  reg:
+    maxItems: 1
+
+  reg-names:
+    const: audio-qaif-core
+
+  iommus:
+    maxItems: 1
+
+  clocks:
+    minItems: 15
+    maxItems: 15
+
+  clock-names:
+    items:
+      - const: gcc_lpass_config_clk
+      - const: gcc_lpass_core_axim_clk
+      - const: audio_core_cc_aud_dma_clk
+      - const: audio_core_cc_aud_dma_mem_clk
+      - const: audio_core_cc_bus_clk
+      - const: audio_core_cc_aif_if0_ebit_clk
+      - const: audio_core_cc_aif_if0_ibit_clk
+      - const: audio_core_cc_aif_if1_ebit_clk
+      - const: audio_core_cc_aif_if1_ibit_clk
+      - const: audio_core_cc_aif_if2_ebit_clk
+      - const: audio_core_cc_aif_if2_ibit_clk
+      - const: audio_core_cc_aif_if3_ebit_clk
+      - const: audio_core_cc_aif_if3_ibit_clk
+      - const: audio_core_cc_ext_mclka_clk
+      - const: audio_core_cc_ext_mclkb_clk
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-names:
+    const: qaif-irq-audio-core
+
+  '#sound-dai-cells':
+    const: 1
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+  aif-interface:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: TDM/MI2S interface configuration referenced by this controller.
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - iommus
+  - clocks
+  - clock-names
+  - interrupts
+  - interrupt-names
+  - '#sound-dai-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/qcom,shikra-audiocorecc.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+
+    audio@a000000 {
+        compatible = "qcom,shikra-qaif-cpu";
+        reg = <0x0a000000 0x20000>;
+        reg-names = "audio-qaif-core";
+        iommus = <&apps_smmu 0x1c0 0x0>;
+        clocks = <&gcc 0>, <&gcc 1>,
+                 <&audiocorecc AUDIO_CORE_CC_AUD_DMA_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AUD_DMA_MEM_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_BUS_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF0_EBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF0_IBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF1_EBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF1_IBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF2_EBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF2_IBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF3_EBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_AIF_IF3_IBIT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_EXT_MCLKA_OUT_CLK>,
+                 <&audiocorecc AUDIO_CORE_CC_EXT_MCLKB_OUT_CLK>;
+        clock-names = "gcc_lpass_config_clk", "gcc_lpass_core_axim_clk",
+                      "audio_core_cc_aud_dma_clk",
+                      "audio_core_cc_aud_dma_mem_clk",
+                      "audio_core_cc_bus_clk",
+                      "audio_core_cc_aif_if0_ebit_clk",
+                      "audio_core_cc_aif_if0_ibit_clk",
+                      "audio_core_cc_aif_if1_ebit_clk",
+                      "audio_core_cc_aif_if1_ibit_clk",
+                      "audio_core_cc_aif_if2_ebit_clk",
+                      "audio_core_cc_aif_if2_ibit_clk",
+                      "audio_core_cc_aif_if3_ebit_clk",
+                      "audio_core_cc_aif_if3_ibit_clk",
+                      "audio_core_cc_ext_mclka_clk",
+                      "audio_core_cc_ext_mclkb_clk";
+        interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "qaif-irq-audio-core";
+        #sound-dai-cells = <1>;
+    };
+
+...

sound/soc/qcom/Kconfig

@@ -71,6 +71,16 @@ config SND_SOC_QCOM_COMMON
 config SND_SOC_QCOM_SDW
 	tristate
 
+config SND_SOC_QCOM_QAIF
+	tristate "Qualcomm QAIF audio interface support"
+	depends on COMMON_CLK
+	select REGMAP_MMIO
+	help
+	  Say Y or M to enable Qualcomm Audio Interface (QAIF) support
+	  used on Shikra audio platforms. QAIF provides DMA-based audio
+	  data transfer between the application processor and the audio
+	  hardware interfaces (AIF and CIF).
+
 config SND_SOC_QDSP6_COMMON
 	tristate
 
@@ -202,6 +212,7 @@ config SND_SOC_SC8280XP
 	select SND_SOC_QDSP6
 	select SND_SOC_QCOM_COMMON
 	select SND_SOC_QCOM_SDW
+	select SND_SOC_QCOM_QAIF
 	help
 	  To add support for audio on Qualcomm Technologies Inc.
 	  SC8280XP SoC-based systems.

sound/soc/qcom/Makefile

@@ -31,6 +31,7 @@ snd-soc-qcom-common-y := common.o
 snd-soc-qcom-sdw-y := sdw.o
 snd-soc-x1e80100-y := x1e80100.o
 snd-soc-qcom-offload-utils-objs := usb_offload_utils.o
+snd-soc-qcom-qaif-y := qaif-cpu.o qaif-platform.o qaif-shikra.o
 
 obj-$(CONFIG_SND_SOC_STORM) += snd-soc-storm.o
 obj-$(CONFIG_SND_SOC_APQ8016_SBC) += snd-soc-apq8016-sbc.o
@@ -44,6 +45,7 @@ obj-$(CONFIG_SND_SOC_QCOM_COMMON) += snd-soc-qcom-common.o
 obj-$(CONFIG_SND_SOC_QCOM_SDW) += snd-soc-qcom-sdw.o
 obj-$(CONFIG_SND_SOC_X1E80100) += snd-soc-x1e80100.o
 obj-$(CONFIG_SND_SOC_QCOM_OFFLOAD_UTILS) += snd-soc-qcom-offload-utils.o
+obj-$(CONFIG_SND_SOC_QCOM_QAIF) += snd-soc-qcom-qaif.o
 
 #DSP lib
 obj-$(CONFIG_SND_SOC_QDSP6) += qdsp6/