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Level 3 cache #5

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martijnbesamusca wants to merge 16 commits into
marg-tools:mainfrom
martijnbesamusca:main
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Level 3 cache #5
martijnbesamusca wants to merge 16 commits into
marg-tools:mainfrom
martijnbesamusca:main

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@martijnbesamusca
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Under the supervision of Anuj Pathania, I added level 3 cache support. This change adds stacked and non-stacked L3 cache to all architecture types (2D, 3Dmem, 2.5D & 3D).

8 new configurations are added based on the gainestown config, but with stacked or non-stacked l3 cache.cd
Also, other configurations with l3 cache can be made via new arguments in floorplanlib.
Heatview and simulationcontrol are both updated to support l3 cache.

My thesis contains a part about how to use my newly added code. I hope this looks good, if any changes or clarifications are needed let me know.

Comment thread scripts/heatView.py Outdated
Comment thread scripts/heatView.py Outdated
print("DEBUG:: plot_opaque_cube: x=%d,y=%d,z=%d" %(x,y,z))

kwargs = {'alpha': alpha, 'color': color, 'edgecolor': 'k', 'shade':False}
kwargs = {'alpha': alpha, 'color': color, 'edgecolor': 'k', 'shade':False, 'zorder':1/(z+1)}
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What does the setting of zorder do?

Comment thread scripts/heatView.py
layer_num = zz
annotate_text = layer_type + " L"+ str(layer_num)
if (zdim > 1 or zstart > 0):
if (layer_type and (zdim > 1 or zstart > 0)):
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What does layer_type inside the if indicate? Shouldn't it be compared with something? Please check

Comment thread scripts/heatView.py Outdated
Comment thread scripts/heatView.py
Comment thread scripts/heatView.py
if (arch_type == "DDR"):
plot_type = "2D"
# if (arch_type == "DDR"):
# plot_type = "2D"
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why did we remove this? We want to enforce 2D plotting if it is a DDR configuration chosen

Comment thread scripts/heatView.py
ystart = (float)(banks_in_y)/cores_and_l3_in_y*cores_in_y
zstart = 0 if inverted_view else banks_in_z
else:
xwidth = cores_in_x
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I believe we are assuming that cache is always below the core. Just confirming

Comment thread scripts/heatView.py
if (arch_type=="3D"):
xwidth=(float)(banks_in_x)/cores_in_x
ywidth=(float)(banks_in_y)/cores_in_y
ywidth=(float)(banks_in_y)/cores_and_l3_in_y
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Do we assume that cache_l3_width is in y-dimension only? Is there any notion of x-dimension also for cache?

Comment thread scripts/memTherm_core.py
if (c_init_file_external!= "None") or (not first_run):
c_hotspot_args += ' -init_file ' + c_init_file

#print hotspot_binary, hotspot_args
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we need not comment out the hotspot_binary printing. Adding the core hotspot printing in next line is good, but this should be also retained.

Comment thread scripts/memTherm_core.py
#extract l3 data to later place it at the end
if (power_l3):
c_power_data = c_power_data.split('\t')
l3_power_data = c_power_data[-2]
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What does -2 signify in this index?

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2 participants