Opttt

.gitignore

@@ -11,4 +11,9 @@ build
 asm_output
 bmark_output
 *testvectors.input
-
+DVEfiles
+lab4_alu
+tests
+Makefile
+README.txt
+asap7.yml

build/par-rundir/timingReports/riscv_top_postRoute.SI_Glitches.rpt

@@ -0,0 +1,4 @@
+NetName                                 vlPeak      vlView              vhPeak      vhView              
+#
+
+Total number of glitch violations: 0

build/par-rundir/timingReports/riscv_top_postRoute.cap

@@ -0,0 +1,11 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:15 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################
+# Net / InstPin                         MaxCap      Cap             CapSlack         CellPort            Remark    
+#
+
+*info: there is 0 max_cap violation in the design.

build/par-rundir/timingReports/riscv_top_postRoute.fanout

@@ -0,0 +1,11 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:15 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################
+# Net / InstPin                         MaxFanLoad  FanLoad         FanLoadSlk       CellPort             Remark    
+#
+
+*info: there is 0 max fanout load violation in the design.

build/par-rundir/timingReports/riscv_top_postRoute.length

@@ -0,0 +1,7 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:15 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################

build/par-rundir/timingReports/riscv_top_postRoute.summary

@@ -0,0 +1,36 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:08 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################
+
+------------------------------------------------------------
+     opt_design Final SI Timing Summary                             
+------------------------------------------------------------
+
++--------------------+---------+---------+---------+---------+
+|     Setup mode     |   all   | reg2reg |reg2cgate| default |
++--------------------+---------+---------+---------+---------+
+|           WNS (ns):|  0.002  |  0.002  |  0.004  |  0.129  |
+|           TNS (ns):|  0.000  |  0.000  |  0.000  |  0.000  |
+|    Violating Paths:|    0    |    0    |    0    |    0    |
+|          All Paths:|  1344   |  1269   |   43    |  1344   |
++--------------------+---------+---------+---------+---------+
+
++----------------+-------------------------------+------------------+
+|                |              Real             |       Total      |
+|    DRVs        +------------------+------------+------------------|
+|                |  Nr nets(terms)  | Worst Vio  |  Nr nets(terms)  |
++----------------+------------------+------------+------------------+
+|   max_cap      |      0 (0)       |   0.000    |      0 (0)       |
+|   max_tran     |      0 (0)       |   0.000    |      0 (0)       |
+|   max_fanout   |      0 (0)       |     0      |      0 (0)       |
+|   max_length   |      0 (0)       |     0      |      0 (0)       |
++----------------+------------------+------------+------------------+
+
+Density: 23.427%
+       (99.999% with Fillers)
+Total number of glitch violations: 0
+------------------------------------------------------------

build/par-rundir/timingReports/riscv_top_postRoute.tran

@@ -0,0 +1,11 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:15 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################
+# Net / InstPin                               MaxTranTime      TranTime         TranSlack        CellPort             Remark    
+#
+
+*info: there is 0 max_tran violation in the design.

build/par-rundir/timingReports/riscv_top_postRoute_hold.summary

@@ -0,0 +1,36 @@
+###############################################################
+#  Generated by:      Cadence Innovus 18.10-p002_1
+#  OS:                Linux x86_64(Host ID c125m-16.EECS.Berkeley.EDU)
+#  Generated on:      Mon Dec 14 22:07:08 2020
+#  Design:            riscv_top
+#  Command:           opt_design -post_route -setup -hold
+###############################################################
+
+------------------------------------------------------------
+     opt_design Final SI Timing Summary                             
+------------------------------------------------------------
+
++--------------------+---------+---------+---------+---------+
+|     Hold mode      |   all   | reg2reg |reg2cgate| default |
++--------------------+---------+---------+---------+---------+
+|           WNS (ns):| -0.000  | -0.000  |  0.013  |  0.012  |
+|           TNS (ns):| -0.000  | -0.000  |  0.000  |  0.000  |
+|    Violating Paths:|    2    |    2    |    0    |    0    |
+|          All Paths:|  1344   |  1269   |   43    |  1344   |
++--------------------+---------+---------+---------+---------+
+
++----------------+-------------------------------+------------------+
+|                |              Real             |       Total      |
+|    DRVs        +------------------+------------+------------------|
+|                |  Nr nets(terms)  | Worst Vio  |  Nr nets(terms)  |
++----------------+------------------+------------+------------------+
+|   max_cap      |      0 (0)       |   0.000    |      0 (0)       |
+|   max_tran     |      0 (0)       |   0.000    |      0 (0)       |
+|   max_fanout   |      0 (0)       |     0      |      0 (0)       |
+|   max_length   |      0 (0)       |     0      |      0 (0)       |
++----------------+------------------+------------+------------------+
+
+Density: 23.427%
+       (99.999% with Fillers)
+Total number of glitch violations: 0
+------------------------------------------------------------