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Support MXINT4 scheme #1666
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Support MXINT4 scheme #1666
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31b1135
add mxint4
mengniwang95 1427510
refine code and add ut
mengniwang95 fa398e7
update doc
mengniwang95 dec438b
add file
mengniwang95 b86dc11
[pre-commit.ci] auto fixes from pre-commit.com hooks
pre-commit-ci[bot] 3372e60
fix ut
mengniwang95 961822d
Merge branch 'main' into mengni/mx_int4
mengniwang95 ea72329
Update int4_utils.py
mengniwang95 5370e66
Merge branch 'main' into mengni/mx_int4
mengniwang95 9434da3
Update qlinear_int.py
mengniwang95 1e5a6d7
Update qlinear_int.py
mengniwang95 403c56f
Merge branch 'main' into mengni/mx_int4
mengniwang95 a92b4eb
update file name and packing format
mengniwang95 6137436
update doc
mengniwang95 30911e7
Merge branch 'main' into mengni/mx_int4
mengniwang95 e8e3d59
Update backend.py
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| Original file line number | Diff line number | Diff line change |
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| # Copyright (c) 2026 Intel Corporation | ||
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| # | ||
| # Licensed under the Apache License, Version 2.0 (the "License"); | ||
| # you may not use this file except in compliance with the License. | ||
| # You may obtain a copy of the License at | ||
| # | ||
| # http://www.apache.org/licenses/LICENSE-2.0 | ||
| # | ||
| # Unless required by applicable law or agreed to in writing, software | ||
| # distributed under the License is distributed on an "AS IS" BASIS, | ||
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| # See the License for the specific language governing permissions and | ||
| # limitations under the License. | ||
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| # Copyright (c) 2021 - present / Neuralmagic, Inc. All Rights Reserved. | ||
| # | ||
| # Licensed under the Apache License, Version 2.0 (the "License"); | ||
| # you may not use this file except in compliance with the License. | ||
| # You may obtain a copy of the License at | ||
| # | ||
| # http://www.apache.org/licenses/LICENSE-2.0 | ||
| # | ||
| # Unless required by applicable law or agreed to in writing, | ||
| # software distributed under the License is distributed on an "AS IS" BASIS, | ||
| # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| # See the License for the specific language governing permissions and | ||
| # limitations under the License. | ||
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| from typing import Optional | ||
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| import torch | ||
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| _DEVICE_E0M4_TENSORS = {} | ||
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| # Constants for INT4 values | ||
| _E0M4_VALUES = [0.0, 0.25, 0.5, 0.75, 1.0, 1.25, 1.5, 1.75] | ||
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| def get_e0m4_tensor(device): | ||
| """Get device-specific E0M4 lookup tensor, creating it if needed.""" | ||
| device_str = str(device) | ||
| if device_str not in _DEVICE_E0M4_TENSORS: | ||
| _DEVICE_E0M4_TENSORS[device_str] = torch.tensor(_E0M4_VALUES, dtype=torch.float32, device=device) | ||
| return _DEVICE_E0M4_TENSORS[device_str] | ||
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| def unpack_int4_from_uint8( | ||
| a: torch.Tensor, m: int, n: int, dtype: Optional[torch.dtype] = torch.bfloat16 | ||
| ) -> torch.Tensor: | ||
| """ | ||
| Unpacks uint8 values into int4. Each uint8 contains two int4 values | ||
| (low nibble first). The 4-bit indices are mapped to int4 values using kE0M4ToFloat. | ||
| """ | ||
| if a.device.type == "cuda": | ||
| return _unpack_int4_from_uint8_cuda(a, m, n, dtype) | ||
| else: | ||
| return _unpack_int4_from_uint8_cpu(a, m, n, dtype) | ||
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| @torch.compiler.disable() | ||
| def _unpack_int4_from_uint8_cpu( | ||
| a: torch.Tensor, m: int, n: int, dtype: Optional[torch.dtype] = torch.bfloat16 | ||
| ) -> torch.Tensor: | ||
| return _unpack_int4_from_uint8(a, m, n, dtype) | ||
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| # @torch.compile(fullgraph=True, dynamic=True) | ||
| def _unpack_int4_from_uint8_cuda( | ||
| a: torch.Tensor, m: int, n: int, dtype: Optional[torch.dtype] = torch.bfloat16 | ||
| ) -> torch.Tensor: | ||
| return _unpack_int4_from_uint8(a, m, n, dtype) | ||
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| def _unpack_int4_from_uint8( | ||
| a: torch.Tensor, m: int, n: int, dtype: Optional[torch.dtype] = torch.bfloat16 | ||
| ) -> torch.Tensor: | ||
| """ | ||
| Unpacks uint8 values into int4. Each uint8 consists of two int4 values | ||
| (i.e. first four bits correspond to one int4 value, last four correspond to a | ||
| consecutive int4 value). The bits represent an index, which are mapped to an int4 | ||
| value. | ||
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| :param a: tensor to unpack | ||
| :param m: original dim 0 size of the unpacked tensor | ||
| :param n: original dim 1 size of the unpacked tensor | ||
| :param dtype: dense dtype to cast the unpacked tensor to | ||
| """ | ||
| assert a.dtype == torch.uint8, f"expected uint8, got {a.dtype}" | ||
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| # Vectorized nibble processing | ||
| a_flat = a.flatten() | ||
| high = (a_flat & 0xF0) >> 4 # Upper nibbles | ||
| low = a_flat & 0x0F # Lower nibbles | ||
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| # Combine nibbles for batch processing | ||
| combined = torch.stack((low, high), dim=1).flatten() | ||
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| # Vectorized sign and magnitude extraction | ||
| signs = (combined & 0x08).to(torch.bool) # Sign bits | ||
| abs_vals = (combined & 0x07).to(torch.long) # Magnitude indices | ||
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| # Device-aware lookup and sign application | ||
| kE0M4 = get_e0m4_tensor(device=a.device) | ||
| values = kE0M4[abs_vals] * torch.where(signs, -1.0, 1.0) | ||
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| # Reshape to final form | ||
| return values.reshape(m, n).to(dtype=dtype) | ||
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