feat: Adds SSE4.2 optimized for x86-64#258
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Introduces hand-written SSE4.2 SIMD implementations for core compression and decompression routines. This provides a performance uplift for x86-64 CPUs that support SSE4.2 (and its implied instruction sets like SSSE3/SSE4.1) but lack AVX2 or AVX512, broadening SIMD acceleration to more hardware. Includes optimized paths for: - LZ77 match finding (16-byte comparisons). - Numerical block encoding/decoding (delta-of-delta, zigzag, prefix sum). - Dynamic programming cost updates for optimal parsing. - Byte run and literal match searching. - Overlapping memory copy utilities. The build system, CPU feature detection, and function dispatch logic have been updated to support the new SSE4.2 variant, prioritizing it over generic scalar code when AVX2/AVX512 are not available.
Introduces a new multiarch workflow job configured to run on a `Nehalem` CPU emulation. This ensures that the recently added SSE4.2 optimized kernels are properly tested on systems that support SSE4.2 but do not have AVX2 or AVX512, verifying correct feature dispatch and execution.
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Ensures compatibility with the zxc library's current development state, enabling accurate benchmarking for features such as the recently added SSE4.2 kernels.
Integrates the build process for SSE4.2 optimized compression, decompression, and Huffman kernels into the Rust `zxc-sys` wrapper. This enables the Rust binding to leverage the recently added SSE4.2 SIMD implementations for x86-64, providing wider hardware acceleration.
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Introduces a new set of hand-written SIMD optimized kernels leveraging SSE4.2 instruction set extensions for x86-64 processors.
These optimizations target CPUs that support SSE4.2 but lack AVX2 or AVX512, providing a performance uplift over the scalar fallback. The changes accelerate core compression and decompression routines, including:
The update also includes: