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22 changes: 21 additions & 1 deletion riscv64/riscv64asm/gnu.go
Original file line number Diff line number Diff line change
Expand Up @@ -29,8 +29,9 @@ func GNUSyntax(inst Inst) string {
}

op := strings.ToLower(inst.Op.String())
gnuSyntaxSwitch:
switch inst.Op {
case ADDI, ADDIW, ANDI, ORI, SLLI, SLLIW, SRAI, SRAIW, SRLI, SRLIW, XORI:
case ADDI, ADDIW, ANDI, SLLI, SLLIW, SRAI, SRAIW, SRLI, SRLIW, XORI:
if inst.Op == ADDI {
if inst.Args[1].(Reg) == X0 && inst.Args[0].(Reg) != X0 {
op = "li"
Expand Down Expand Up @@ -65,6 +66,25 @@ func GNUSyntax(inst Inst) string {
args = args[:len(args)-1]
}

case ORI:
if inst.Args[0].(Reg) == X0 {
simm := inst.Args[2].(Simm)
switch simm.Imm & 0b11111 {
case 0:
op = "prefetch.i"
case 1:
op = "prefetch.r"
case 3:
op = "prefetch.w"
default:
break gnuSyntaxSwitch
}
// compared to ORI, the lowest 5 bits of simm.Imm in PREFETCH should be zeros
simm.Imm = simm.Imm &^ 0b11111
args[0] = RegOffset{inst.Args[1].(Reg), simm}.String()
args = args[:len(args)-2]
}

case ADD:
if inst.Args[1].(Reg) == X0 {
op = "mv"
Expand Down
6 changes: 4 additions & 2 deletions riscv64/riscv64asm/objdumpext_test.go
Original file line number Diff line number Diff line change
Expand Up @@ -272,12 +272,14 @@ func writeELF64(f *os.File, size int) error {
strtabsize := len("\x00.text\x00.riscv.attributes\x00.shstrtab\x00")
// RISC-V objdump needs the .riscv.attributes section to identify
// the RV64G (not include compressed) extensions.
attributesContent := "A\x9e\x00\x00\x00riscv\x00\x01\x94\x00\x00\x00\x05rv64i2p0_m2p0_a2p0_f2p0_d2p0_q2p0_c2p0_v1p0_zicbom1p0_zicbop1p0_zicboz1p0_zicond1p0_zmmul1p0_zfh1p0_zfhmin1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0\x00\x08\x01\x0a\x0b"
attributesSize := len(attributesContent)
sect = elf.Section64{
Name: uint32(len("\x00.text\x00")),
Type: uint32(0x70000003), // SHT_RISCV_ATTRIBUTES
Addr: 0,
Off: uint64(off2 + (off3-off2)*4 + strtabsize),
Size: 129,
Size: uint64(attributesSize),
Addralign: 1,
}
binary.Write(&buf, binary.LittleEndian, &sect)
Expand All @@ -293,7 +295,7 @@ func writeELF64(f *os.File, size int) error {
buf.WriteString("\x00.text\x00.riscv.attributes\x00.shstrtab\x00")
// Contents of .riscv.attributes section
// which specify the extension and priv spec version. (1.11)
buf.WriteString("A\x80\x00\x00\x00riscv\x00\x01\x76\x00\x00\x00\x05rv64i2p0_m2p0_a2p0_f2p0_d2p0_q2p0_c2p0_v1p0_zicond1p0_zmmul1p0_zfh1p0_zfhmin1p0_zba1p0_zbb1p0_zbc1p0_zbs1p0\x00\x08\x01\x0a\x0b")
buf.WriteString(attributesContent)
f.Write(buf.Bytes())
return nil
}
20 changes: 20 additions & 0 deletions riscv64/riscv64asm/plan9x.go
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text

op := inst.Op.String()

goSyntaxSwitch:
switch inst.Op {

case AMOADD_D, AMOADD_D_AQ, AMOADD_D_RL, AMOADD_D_AQRL, AMOADD_W, AMOADD_W_AQ,
Expand Down Expand Up @@ -74,6 +75,25 @@ func GoSyntax(inst Inst, pc uint64, symname func(uint64) (string, uint64), text
args = args[:len(args)-1]
}

case ORI:
if inst.Args[0].(Reg) == X0 {
simm := inst.Args[2].(Simm)
switch simm.Imm & 0b11111 {
case 0:
op = "PREFETCHI"
case 1:
op = "PREFETCHR"
case 3:
op = "PREFETCHW"
default:
break goSyntaxSwitch
}
// compared to ORI, the lowest 5 bits of simm.Imm in PREFETCH should be zeros
simm.Imm = simm.Imm &^ 0b11111
args[0] = plan9Arg(&inst, pc, symname, RegOffset{inst.Args[1].(Reg), simm})
args = args[:len(args)-2]
}

case ANDI:
if inst.Args[2].(Simm).Imm == 255 {
op = "MOVBU"
Expand Down
16 changes: 16 additions & 0 deletions riscv64/riscv64asm/tables.go

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15 changes: 15 additions & 0 deletions riscv64/riscv64asm/testdata/gnucases.txt
Original file line number Diff line number Diff line change
Expand Up @@ -415,6 +415,21 @@ a260| ld x1,8(x2)
b353530e| czero.eqz x7,x6,x5
b373530e| czero.nez x7,x6,x5

# 19.6.1: Cache-Block Management Instructions (Zicbom), Version 1.0.0
0fa01200| cbo.clean (x5)
0fa02200| cbo.flush (x5)
0fa00200| cbo.inval (x5)

# 19.6.2: Cache-Block Zero Instructions (Zicboz), Version 1.0.0
0fa04200| cbo.zero (x5)

# 19.6.3: Cache-Block Prefetch Instructions (Zicbop), Version 1.0.0
13e0021c| prefetch.i 448(x5)
13e00200| prefetch.i 0(x5)
13e002fc| prefetch.i -64(x5)
13e0121c| prefetch.r 448(x5)
13e0321c| prefetch.w 448(x5)
13e07200| ori x0,x5,7
# 28.4.3: Zbc: Carry-less multiplication
b313530a| clmul x7,x6,x5
b333530a| clmulh x7,x6,x5
Expand Down
15 changes: 15 additions & 0 deletions riscv64/riscv64asm/testdata/plan9cases.txt
Original file line number Diff line number Diff line change
Expand Up @@ -369,6 +369,21 @@ b3115228| BSET X5, X4, X3
b353530e| CZEROEQZ X5, X6, X7
b373530e| CZERONEZ X5, X6, X7

# 19.6.1: Cache-Block Management Instructions (Zicbom), Version 1.0.0
0fa01200| CBOCLEAN (X5)
0fa02200| CBOFLUSH (X5)
0fa00200| CBOINVAL (X5)

# 19.6.2: Cache-Block Zero Instructions (Zicboz), Version 1.0.0
0fa04200| CBOZERO (X5)

# 19.6.3: Cache-Block Prefetch Instructions (Zicbop), Version 1.0.0
13e0021c| PREFETCHI 448(X5)
13e00200| PREFETCHI (X5)
13e002fc| PREFETCHI -64(X5)
13e0121c| PREFETCHR 448(X5)
13e0321c| PREFETCHW 448(X5)
13e07200| ORI $7, X5, X0
# 28.4.3: Zbc: Carry-less multiplication
b313530a| CLMUL X5, X6, X7
b333530a| CLMULH X5, X6, X7
Expand Down
4 changes: 4 additions & 0 deletions riscv64/riscv64spec/spec.go
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ var extensions = []string{
"rv_zbb",
"rv_zbc",
"rv_zbs",
"rv_zicbo",
"rv_zfh",
"rv_zicond",
"rv_zicsr",
Expand Down Expand Up @@ -288,6 +289,9 @@ func inferFormats(argTypeList []string, op string) string {
case strings.Contains(op, "AMO") || strings.Contains(op, "SC_"):
return "arg_rd, arg_rs2, arg_rs1_ptr"

case strings.Contains(op, "CBO_"):
return "arg_rs1_ptr"

case strings.Contains(op, "LR_"):
return "arg_rd, arg_rs1_ptr"

Expand Down