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test(rk3588): remove rockchip-pm#42

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yueneiqi wants to merge 1 commit intodrivercraft:mainfrom
yueneiqi:develop
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test(rk3588): remove rockchip-pm#42
yueneiqi wants to merge 1 commit intodrivercraft:mainfrom
yueneiqi:develop

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@yueneiqi
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电源实际是 uboot 在 usb start 打开的, rockchip-pm 没有起效果,去除相关逻辑。

测试:

  • 在 orangepi5p 上的日志:

🐛 0.000ns    [sparreal_kernel::driver:16] add registers
🐛 0.000ns    [rdrive::probe::fdt:168] Probe [interrupt-controller@fe600000]->[GICv3]
🐛 0.000ns    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fe600000, 0xffff9000fe610000) -> [0xfe600000,)🐛 0.000ns    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fe680000, 0xffff9000fe780000) -> [0xfe680000,)🐛 0.000ns    [rdrive::probe::fdt:168] Probe [timer]->[ARMv8 Timer]
🐛 0.000ns    [sparreal_rt::arch::timer:78] ARMv8 Timer IRQ: IrqConfig { irq: 0x1e, trigger: LevelHigh, is_private: true }
🐛 0.000ns    [rdrive::probe::fdt:168] Probe [psci]->[ARM PSCI]
🐛 0.000ns    [sparreal_rt::arch::power:76] PCSI [Smc]
🐛 0.000ns    [sparreal_kernel::irq:39] [GICv3](405) open
🔍 0.000ns    [arm_gic_driver::version::v3:342] Initializing GICv3 Distributor@0xffff9000fe600000, security state: NonSecure...
🔍 0.000ns    [arm_gic_driver::version::v3:356] GICv3 Distributor disabled
🔍 0.000ns    [arm_gic_driver::version::v3:865] CPU interface initialization for CPU: 0x0
🔍 0.000ns    [arm_gic_driver::version::v3:921] CPU interface initialized successfully
🐛 0.000ns    [sparreal_kernel::irq:64] [GICv3](405) init cpu: CPUHardId(0)
🐛 0.000ns    [sparreal_rt::arch::timer:30] ARMv8 Timer: Enabled
🐛 16.693s    [sparreal_kernel::irq:136] Enable irq 0x1e on chip 405
🐛 16.694s    [sparreal_kernel::hal_al::run:33] Driver initialized
🐛 17.305s    [rdrive:132] probe pci devices
begin test
Run test: test_all
🐛 17.458s    [test::tests:298] skip usb@fc000000 because dr_mode=otg
usb node: usb@fc400000
usb regs: [<0xfc400000, 0x400000>]
💡 17.548s    [test::tests:359] power-domains for usb@fc400000 present (1 entries); PM control skipped
🐛 17.751s    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fec40000, 0xffff9000fec41000) -> [0xfec40000,)💡 17.753s    [test::tests:436] vcc5v0_host enabled via gpio ctrl phandle 0x10e, pin 15
🐛 17.781s    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fd5d0000, 0xffff9000fd5d4000) -> [0xfd5d0000,)💡 17.783s    [test::tests:481] usb2phy-grf syscon@fd5d0000 active (CON3 suspend override set)
🐛 17.811s    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fd5c8000, 0xffff9000fd5cc000) -> [0xfd5c8000,)💡 17.812s    [test::tests:518] usbdpphy-grf syscon@fd5c8000 active (CON3 override/powerdown cleared)
🐛 17.842s    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fd7c0000, 0xffff9000fd81c000) -> [0xfd7c0000,)🐛 17.844s    [somehal::arch::mem::mmu:181] Map `iomap       `: RW- | [0xffff9000fc400000, 0xffff9000fc800000) -> [0xfc400000,)🐛 17.974s    [sparreal_kernel::irq:136] Enable irq 0xfd on chip 405
🐛 17.975s    [crab_usb::backend::xhci:203] Extended capabilities: 3
🐛 17.975s    [crab_usb::backend::xhci:215] legacy init
🐛 18.076s    [crab_usb::backend::xhci:228] claimed ownership from BIOS
🐛 18.077s    [crab_usb::backend::xhci:130] Reset begin ...
🐛 18.078s    [crab_usb::backend::xhci:139] Halted
🐛 18.078s    [crab_usb::backend::xhci:141] Wait for ready...
🐛 18.079s    [crab_usb::backend::xhci:145] Ready
🐛 18.080s    [crab_usb::backend::xhci:151] Reset HC
🐛 18.080s    [crab_usb::backend::xhci:157] Reset finish
🐛 18.081s    [crab_usb::backend::xhci:175] Max device slots: 64
🐛 18.084s    [crab_usb::backend::xhci::root:123] Disable interrupts
🐛 18.084s    [crab_usb::backend::xhci::root:99] DCBAAP: 23ED000
🐛 18.085s    [crab_usb::backend::xhci::root:109] CRCR: 23EA000
🐛 18.086s    [crab_usb::backend::xhci::root:143] ERDP: 23eb000
🐛 18.087s    [crab_usb::backend::xhci::root:151] ERSTZ: 1
🐛 18.087s    [crab_usb::backend::xhci::root:153] ERSTBA: 23EC000
🐛 18.088s    [crab_usb::backend::xhci::root:165] Enabling primary interrupter.
🐛 18.089s    [crab_usb::backend::xhci::root:193] Scratch buf count: 1
🐛 18.090s    [crab_usb::backend::xhci::root:205] Setting up 1 scratchpads, at 0x23ec040
🐛 18.091s    [crab_usb::backend::xhci::root:218] Start run
💡 18.142s    [crab_usb::backend::xhci::root:483] Running
🐛 18.242s    [crab_usb::backend::xhci::root:129] Enable interrupts
🐛 18.243s    [crab_usb::backend::xhci::root:283] Port 0 start reset
🐛 18.244s    [crab_usb::backend::xhci::root:283] Port 1 start reset
🐛 18.295s    [crab_usb::backend::xhci::root:319] Port 0 reset completed, checking status
🐛 18.296s    [crab_usb::backend::xhci::root:321] Port 0 s after reset: enabled=true, concted=true, speed=3
🐛 18.299s    [crab_usb::backend::xhci::root:319] Port 1 reset completed, checking status
🐛 18.300s    [crab_usb::backend::xhci::root:321] Port 1 status after reset: enabled=true, connected=true, speed=4
💡 18.401s    [test::tests:44] usb host init ok
💡 18.402s    [test::tests:45] usb cmd test
💡 18.402s    [crab_usb::backend::xhci:250] Port 0: Enabled: true, Connected: true, Speed 3, Power true
💡 18.403s    [crab_usb::backend::xhci:250] Port 1: Enabled: true, Connected: true, Speed 4, Power true
🐛 18.404s    [crab_usb::backend::xhci::root:528] New device on port 0
🔍 18.405s    [crab_usb::backend::xhci::ring:85] [CMD] >> EnableSlot(EnableSlot { slot_type: 0, cycle_bit: true }) @BusAddr(23)
🔍 18.406s    [usb_if::transfer::wait:73] WaitMap: try_wait_for_result called with id 23EA000, elem@0xffff9003ffe10000 false

@yueneiqi yueneiqi closed this Jan 12, 2026
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