Perf: OpenMP cache blocking and SIMD for PW_Basis FFT transform copy routines#7439
Open
MiniYuanBot wants to merge 1 commit into
Open
Perf: OpenMP cache blocking and SIMD for PW_Basis FFT transform copy routines#7439MiniYuanBot wants to merge 1 commit into
MiniYuanBot wants to merge 1 commit into
Conversation
Author
|
\label project_learning |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
What's changed
This PR optimizes the memory-bound copy loops in
PW_Basis::real2recipandPW_Basis::recip2real(source/module_pw/pw_transform.cpp) using cache blocking and SIMD vectorization, while maintaining full numerical compatibility with the original implementation.Key Changes
Cache blocking (tiling)
Introduced a unified block size
pw_transform_cache_block = 1024and helperblock_end(). All long copy loops are rewritten in a two-level structure:This keeps the working set in L1/L2 cache and mitigates false sharing across OpenMP threads.
SIMD vectorization
Added
#pragma omp simdto the inner stride-1 loops (continuous copy, zeroing, and accumulation). This helps the compiler emit contiguous SIMD instructions (AVX2/AVX-512) forstd::complex<FPTYPE>and real-valued buffers.Alias analysis & pointer caching
Cached frequently accessed member variables (
nrxx,npw,nxyz,ig2isz) and FFT buffer pointers (auxr,auxg,rspace) as localconstvariables. This reduces repeatedthis->indirection and improves compiler aliasing assumptions.Finer-grained timers
Added sub-timers (
real2recip_copy_r,real2recip_copy_g,recip2real_copy_r,recip2real_copy_g) to isolate memory-copy overhead from FFT library time, aiding future profiling.Performance (256^3 grid, ecut=50, 20 repeats, WSL2 GCC 13.3.0)
Files Changed
source/module_pw/pw_transform.cpp— optimized copy loops and timers