Fix zero w aligned new panic#196
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…MA buffers Circle 51 builds with -std=c++17 (GCC 15.2), so heap-allocating an over-aligned type now calls C++17 aligned operator new, which Circle asserts against HEAP_BLOCK_ALIGN. That cap is the data cache line length: 32 on RASPPI=1, 64 on every other model. alignas(64) on the CUSBCDGadget DMA buffer members raised alignof(CUSBCDGadget) to 64, so 'new CUSBCDGadget' in cdromservice panicked at boot on the Pi Zero W while working everywhere else (issue #195). DMA_BUFFER already applies CACHE_ALIGN, which matches the platform cache line (32 on RASPPI=1, 64 elsewhere) - exactly what DMA coherence needs - so the explicit alignas was redundant on all other models. Same bug class as the FTP alignas(512) panic fixed in 9b4c622. Verified with arm-none-eabi-g++ 15.2 (-DRASPPI=1 -std=c++17): alignof(CUSBCDGadget) now fits the 32-byte heap cap; the old header fails the same static_assert. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Fixed issues with recent builds for Pi Zero / W