fixes for RISC-V ABI Implementation #1567#2937
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Fixed RISC-V floating-point ABI by correcting the target triple to `riscv64-unknown-linux-gnu`, adding the `target-abi` module flag, and ensuring ABI-required CPU features are enabled. I tested this with: ```bash build/c3c compile-only --target linux-riscv64 rv_hello.c3 readelf -h obj/linux-riscv64/rv_hello.o | grep Flags # Output: Flags: 0x5, RVC, double-float ABI ``` ```bash # and qemu because I don't have a riscv machine :/ qemu-riscv64-static -L /usr/riscv64-linux-gnu ./rv_hello ``` --- @lerno I purposedly left these two failing tests to clearly see the difference. `test/test_suite/abi/riscv64-lp64-lp64f-abi-1.c3t` `test/test_suite/abi/riscv64-lp64-abi.c3t`
- Implement automatic sysroot and CRT object discovery for RISC-V. - Fix dynamic linker paths and emulation flags for LLD. - Link against libgcc to resolve required arithmetic symbols.
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There is something failing here? |
I don't think so. There are two tests that needs the expected output corrected but I left those without change so you could take a look, as you are more familiar with LLVM IR test/test_suite/abi/riscv64-lp64-lp64f-abi-1.c3t |
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We seem to have something else failing? |
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Alpine Linux to be specific |
use target_host_arch() in linker.c move target_host_arch() from hostinfo.c to target.c
Fixed now, my bad, forgot to commit a macro. I moved |
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Looks like the android builds are not passing now? |
nah, that's just termux servers intermittently not working |
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Thank you! |
2 participants
Fixed RISC-V floating-point ABI by correcting the target triple to
riscv64-unknown-linux-gnu, adding thetarget-abimodule flag, and ensuring ABI-required CPU features are enabled.I tested this with:
# and qemu because I don't have a riscv machine :/ qemu-riscv64-static -L /usr/riscv64-linux-gnu ./rv_hello@lerno I purposedly left these two failing tests to clearly see the difference, so these will make CI fail. Please check this when you have the time.
#1567
#2014 (this one refers to the stdlib, not the abi)