kinetis/serial: Enable RTS as GPIO for RS485CONTROL

arch/arm/src/kinetis/Kconfig

@@ -1409,6 +1409,17 @@ config UART0_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART0.
 
+config UART0_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART0 is GPIO"
+	default n
+	depends on UART0_RS485CONTROL
+	---help---
+		RTS pin of the UART0 is wired to something else than the chip's
+		ALT pin with UART0 RTS functionality.
+
+		The GPIO, to which the UART0's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 config UART1_RS485CONTROL
 	bool "Use UART1 RTS as RS-485 transmit enable"
 	default n
@@ -1417,6 +1428,17 @@ config UART1_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART1.
 
+config UART1_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART1 is GPIO"
+	default n
+	depends on UART1_RS485CONTROL
+	---help---
+		RTS pin of the UART1 is wired to something else than the chip's
+		ALT pin with UART1 RTS functionality.
+
+		The GPIO, to which the UART1's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 config UART2_RS485CONTROL
 	bool "Use UART2 RTS as RS-485 transmit enable"
 	default n
@@ -1425,6 +1447,17 @@ config UART2_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART2.
 
+config UART2_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART2 is GPIO"
+	default n
+	depends on UART2_RS485CONTROL
+	---help---
+		RTS pin of the UART2 is wired to something else than the chip's
+		ALT pin with UART2 RTS functionality.
+
+		The GPIO, to which the UART2's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 config UART3_RS485CONTROL
 	bool "Use UART3 RTS as RS-485 transmit enable"
 	default n
@@ -1433,6 +1466,17 @@ config UART3_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART3.
 
+config UART3_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART3 is GPIO"
+	default n
+	depends on UART3_RS485CONTROL
+	---help---
+		RTS pin of the UART3 is wired to something else than the chip's
+		ALT pin with UART3 RTS functionality.
+
+		The GPIO, to which the UART3's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 config UART4_RS485CONTROL
 	bool "Use UART4 RTS as RS-485 transmit enable"
 	default n
@@ -1441,6 +1485,17 @@ config UART4_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART4.
 
+config UART4_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART4 is GPIO"
+	default n
+	depends on UART4_RS485CONTROL
+	---help---
+		RTS pin of the UART4 is wired to something else than the chip's
+		ALT pin with UART4 RTS functionality.
+
+		The GPIO, to which the UART4's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 config UART5_RS485CONTROL
 	bool "Use UART5 RTS as RS-485 transmit enable"
 	default n
@@ -1449,6 +1504,17 @@ config UART5_RS485CONTROL
 	---help---
 		Enable RS-485 transmit enable on UART5.
 
+config UART5_RS485CONTROL_RTSISGPIO
+	bool "RTS pin of the UART5 is GPIO"
+	default n
+	depends on UART5_RS485CONTROL
+	---help---
+		RTS pin of the UART5 is wired to something else than the chip's
+		ALT pin with UART5 RTS functionality.
+
+		The GPIO, to which the UART5's RTS pin is wired to, is set to
+		high when sending data and low otherwise.
+
 endmenu # Kinetis RS485 transmit driver support
 
 endmenu # Kinetis UART Configuration

arch/arm/src/kinetis/hardware/kinetis_k40pinmux.h

@@ -351,7 +351,9 @@
 
 #define PIN_LCD_P40              (PIN_ANALOG | PIN_PORTD | PIN0)
 #define PIN_SPI0_PCS0_3          (PIN_ALT2   | PIN_PORTD | PIN0)
-#define PIN_UART2_RTS            (PIN_ALT3   | PIN_PORTD | PIN0)
+#if !defined(PIN_UART2_RTS)
+#  define PIN_UART2_RTS          (PIN_ALT3   | PIN_PORTD | PIN0)
+#endif
 #define PIN_LCD_P40F             (PIN_ALT7   | PIN_PORTD | PIN0)
 #define PIN_LCD_P41              (PIN_ANALOG | PIN_PORTD | PIN1)
 #define PIN_ADC0_SE5B            (PIN_ANALOG | PIN_PORTD | PIN1)

arch/arm/src/kinetis/hardware/kinetis_k60pinmux.h

@@ -346,7 +346,9 @@
 #define PIN_FB_TA                (PIN_ALT6   | PIN_PORTC | PIN19)
 
 #define PIN_SPI0_PCS0_3          (PIN_ALT2   | PIN_PORTD | PIN0)
-#define PIN_UART2_RTS            (PIN_ALT3   | PIN_PORTD | PIN0)
+#if !defined(PIN_UART2_RTS)
+#  define PIN_UART2_RTS          (PIN_ALT3   | PIN_PORTD | PIN0)
+#endif
 #define PIN_FTM3_CH0_2           (PIN_ALT4   | PIN_PORTD | PIN0)
 #define PIN_FB_ALE               (PIN_ALT5   | PIN_PORTD | PIN0)
 #define PIN_FB_CS1               (PIN_ALT5   | PIN_PORTD | PIN0)

arch/arm/src/kinetis/hardware/kinetis_k64pinmux.h

@@ -563,7 +563,9 @@
 #define PIN_UART1_TX_2            (PIN_ALT3   | PIN_PORTE | PIN0)
 
 #define PIN_UART2_CTS             (PIN_ALT3   | PIN_PORTD | PIN1)
-#define PIN_UART2_RTS             (PIN_ALT3   | PIN_PORTD | PIN0)
+#if !defined(PIN_UART2_RTS)
+#  define PIN_UART2_RTS           (PIN_ALT3   | PIN_PORTD | PIN0)
+#endif
 #define PIN_UART2_RX              (PIN_ALT3   | PIN_PORTD | PIN2)
 #define PIN_UART2_TX              (PIN_ALT3   | PIN_PORTD | PIN3)
 

arch/arm/src/kinetis/hardware/kinetis_k66pinmux.h

@@ -678,7 +678,9 @@
 #define PIN_UART1_TX_2            (PIN_ALT3   | PIN_PORTE | PIN0)
 
 #define PIN_UART2_CTS             (PIN_ALT3   | PIN_PORTD | PIN1)
-#define PIN_UART2_RTS             (PIN_ALT3   | PIN_PORTD | PIN0)
+#if !defined(PIN_UART2_RTS)
+#  define PIN_UART2_RTS           (PIN_ALT3   | PIN_PORTD | PIN0)
+#endif
 #define PIN_UART2_RX              (PIN_ALT3   | PIN_PORTD | PIN2)
 #define PIN_UART2_TX              (PIN_ALT3   | PIN_PORTD | PIN3)
 

arch/arm/src/kinetis/kinetis_serial.c

@@ -1288,14 +1288,115 @@ static int up_interrupts(int irq, void *context, void *arg)
        * the TX data register.
        */
 
-      if ((s1 & UART_S1_TDRE) != 0)
+      if ((s1 & UART_S1_TDRE) != 0 && dev->xmit.head != dev->xmit.tail)
 #endif
         {
           /* Process outgoing bytes */
 
           uart_xmitchars(dev);
           handled = true;
         }
+
+      if ((s1 & UART_S1_TC) == 0)
+        {
+          /* TC cleared, transmission started. */
+
+#if defined(CONFIG_UART0_RS485CONTROL_RTSISGPIO)
+          if (&g_uart0priv == priv)
+            {
+              kinetis_gpiowrite(g_uart0priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+#if defined(CONFIG_UART1_RS485CONTROL_RTSISGPIO)
+          if (&g_uart1priv == priv)
+            {
+              kinetis_gpiowrite(g_uart1priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+#if defined(CONFIG_UART2_RS485CONTROL_RTSISGPIO)
+          if (&g_uart2priv == priv)
+            {
+              kinetis_gpiowrite(g_uart2priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+#if defined(CONFIG_UART3_RS485CONTROL_RTSISGPIO)
+          if (&g_uart3priv == priv)
+            {
+              kinetis_gpiowrite(g_uart3priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+#if defined(CONFIG_UART4_RS485CONTROL_RTSISGPIO)
+          if (&g_uart4priv == priv)
+            {
+              kinetis_gpiowrite(g_uart4priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+#if defined(CONFIG_UART5_RS485CONTROL_RTSISGPIO)
+          if (&g_uart5priv == priv)
+            {
+              kinetis_gpiowrite(g_uart5priv.rts_gpio, 1);
+              handled = true;
+            }
+
+#endif
+        }
+      else
+        {
+          /* Transmission complete. Do not set handle, exit immediately. */
+
+#if defined(CONFIG_UART0_RS485CONTROL_RTSISGPIO)
+          if (&g_uart0priv == priv)
+            {
+              kinetis_gpiowrite(g_uart0priv.rts_gpio, 0);
+            }
+
+#endif
+#if defined(CONFIG_UART1_RS485CONTROL_RTSISGPIO)
+          if (&g_uart1priv == priv)
+            {
+              kinetis_gpiowrite(g_uart1priv.rts_gpio, 0);
+            }
+
+#endif
+#if defined(CONFIG_UART2_RS485CONTROL_RTSISGPIO)
+          if (&g_uart2priv == priv)
+            {
+              kinetis_gpiowrite(g_uart2priv.rts_gpio, 0);
+            }
+
+#endif
+#if defined(CONFIG_UART3_RS485CONTROL_RTSISGPIO)
+          if (&g_uart3priv == priv)
+            {
+              kinetis_gpiowrite(g_uart3priv.rts_gpio, 0);
+            }
+
+#endif
+#if defined(CONFIG_UART4_RS485CONTROL_RTSISGPIO)
+          if (&g_uart4priv == priv)
+            {
+              kinetis_gpiowrite(g_uart4priv.rts_gpio, 0);
+            }
+
+#endif
+#if defined(CONFIG_UART5_RS485CONTROL_RTSISGPIO)
+          if (&g_uart5priv == priv)
+            {
+              kinetis_gpiowrite(g_uart5priv.rts_gpio, 0);
+            }
+
+#endif
+        }
     }
 
   return OK;
@@ -1919,20 +2020,16 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
 
 #ifndef CONFIG_SUPPRESS_SERIAL_INTS
       priv->ie |= UART_C2_TIE;
+      priv->ie |= UART_C2_TCIE;
       up_setuartint(priv);
-
-      /* Fake a TX interrupt here by just calling uart_xmitchars() with
-       * interrupts disabled (note this may recurse).
-       */
-
-      uart_xmitchars(dev);
 #endif
     }
   else
     {
       /* Disable the TX interrupt */
 
       priv->ie &= ~UART_C2_TIE;
+      priv->ie &= ~UART_C2_TCIE;
       up_setuartint(priv);
     }