Add HMCAD15XX support and Sharkbyte board support#3269
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Add device tree binding documentation for Analog Devices HMCAD1511 and HMCAD1520 high-speed ADCs with LVDS outputs. Signed-off-by: Paul Pop <paul.pop@analog.com>
Add ADI_REG_ADC_CONFIG_WR and ADI_REG_ADC_CONFIG_RD register definitions for custom ADC configuration in the AXI ADC core. Signed-off-by: Paul Pop <paul.pop@analog.com>
Add support for Analog Devices HMCAD1511 and HMCAD1520 high-speed ADCs with LVDS outputs. Features: - Flexible 1/2/4 channel configurations - 8-bit, 12-bit, and 14-bit resolution modes - Input multiplexer control per channel - Integration with ADI AXI ADC core Signed-off-by: Paul Pop <paul.pop@analog.com>
The ADF5355 is a programmable PLL whose output frequency can change at runtime. Set CLK_GET_RATE_NOCACHE to ensure the clock framework queries the actual rate instead of returning a cached value. Signed-off-by: Paul Pop <paul.pop@analog.com>
Add devicetree support for the Sharkbyte dual HMCAD1520 ADC data acquisition platform. Signed-off-by: Paul Pop <paul.pop@analog.com>
Add default kernel configuration for the Sharkbyte platform. Signed-off-by: Paul Pop <paul.pop@analog.com>
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nunojsa
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Given that this requires much more changes, stopping the review with that one comment
| #include <linux/iio/buffer-dma.h> | ||
| #include <linux/iio/buffer-dmaengine.h> | ||
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| #include "cf_axi_adc.h" |
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AFAICT, There's no reason to support new high speed converters using the old framework! These days we should iio backends which is also upstream and therefore makes possible to upstream this part.
LLM reviewThis series adds the HMCAD1511/HMCAD1520 high-speed ADC driver and Zynq Sharkbyte platform support, plus an ADF5355 clock-flag fix. run: 24855823681
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fix HMCAD1520 14-bit precision mode register 0x31 configuration and kfree fix
PR Description
Add support for the HMCAD1511 and HMCAD1520 high-speed ADCs
with LVDS outputs, along with board support for the Sharkbyte dual-ADC data acquisition platform.
PR Type
PR Checklist