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Add proper VCO and PFD limits for versal based platforms. For that we need to add new Technology and Speed grade defines. tbd: upstream this patch Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Make sure that we can validate the schema and DT example. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Make sure that we can validate the schema and DT example. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Document common properties of the JESD FSM framework. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
This adds support for reading 204C lane latency. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
This patch adds support for external synchronization in the AXI ADC driver. It introduces detection of external sync capability via the ADI_EXT_SYNC bit in the configuration register. A new sysfs interface is added to control synchronization: - sync_start_enable: allows triggering sync actions (arm, disarm, trigger_manual) depending on hardware capabilities. - sync_start_enable_available: lists available sync actions. These additions enable more flexible synchronization control for multi-device setups and JESD204-based systems. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
The ADI support for the driver will include a HDL IP which will support 8-bit transfers as well as a different data load address from the base address. To differentiate from the original driver a ID system has been added and changes have been made based on the ID. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com>
The HDL IP can be configured to run in 8, 16 and 32 bit mode. This will extend the capabilities of the current driver to support 16 bit implementations using compatibility strings. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com>
The HDL IP can be configured to run in 8, 16 and 32 bit mode. This will extend the capabilities of the current driver to support 32 bit implementations using compatibility strings. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com>
In case of LTC6952 we need a REFin can VCOin. Assuming VCOin is provided by CCF, add support for setting the desired rate. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
CPMID should be cleared after init. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
…ings Add round_rate callback, which seem to be needed. Set required mode bits for integer and fractional mode automatically. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
When a DMA transfer is done, the vchan_cookie_complete triggers the axi_dmac_desc_free which is called in IRQ context. This triggers the BUG_ON in vunmap function. To solve this issue a workqueue is created to schedule axi_dmac_desc_free to be performed outside of interrupt context. Signed-off-by: Eliza Balas <eliza.balas@analog.com>
The maximum BSYNC output frequency is 200 MHz per the datasheet, not 250 MHz. The previous value of 250 MHz corresponds to the REFIN maximum, not the BSYNC output maximum. Fixes: 54bbd40 ("iio: frequency: support the adf4030 Synchronizer") Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
The datasheet requires resetting the TDC_ERR monitor (set then clear RST_TDC_ERR in Register 0x61 bit 7) before starting a TDC measurement. Without this step, stale error flags from a previous measurement could persist. Fixes: 54bbd40 ("iio: frequency: support the adf4030 Synchronizer") Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Add devicetree for apollo targeting versal vck190. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Add support for M4-L8-NP16-20p0-4x4. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Adding the device tree for the ZU4 with the default AD9088 profile and clock configuration. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add VU11P revA and revB with the default AD9088 profile and clock configuration. ADF4030 is specific to the revB. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add DT overlays for both REV A/B for with a different profile for debugging purposes. Signed-off-by: Filip Gherman <filip.gherman@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add device tree for nyx personality card. Add new device tree file for a new vu11p usecase (204C_M4_L4_NP16_8p0_2x2). Signed-off-by: Oscar Magana Pantoja <Oscar.MaganaPantoja@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
…rees This commit adds various devicetrees for the Quad Apollo board on VCU118 supporting different usecases. Co-authored-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Co-authored-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Jorge Marques <jorge.marques@analog.com> Co-authored-by: Eliza Balas <eliza.balas@analog.com> Signed-off-by: Eliza Balas <eliza.balas@analog.com> Co-authored-by: Filip Gherman <filip.gherman@analog.com> Signed-off-by: Filip Gherman <filip.gherman@analog.com> Co-authored-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Co-authored-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add new IIO directory for MxFEs and RF transceivers. Make more sense to have a dedicated directory rather than having it on adc/. Will also lead to less conflicts in Kconfigs and Makefiles. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
This imports the BU API as-is wihtout any modification. Following commits will be about making it compilable under linux. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
To simplify range checking Signed-off-by: Jorge Marques <jorge.marques@analog.com>
This patch removes the hardcoded setting of 16-bit resolution for JTx output during test mode configuration. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
… CPU0 Move SerDes Rx calibration data object, size, and version pointers from CPU1 memory space (0x2100054x) to CPU0 memory space (0x2000022x). Update all references in serdes_rx_cal_data_set, serdes_rx_cal_data_get, and serdes_rx_cal_data_len_get to use the corrected CPU0 pointers. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Add APIs for clock conditioning calibration data management to support warmboot functionality. This allows saving and restoring clock conditioning calibration data across device reboots. New APIs added: - adi_apollo_cfg_clk_cond_cal_cfg_set: Configure clock conditioning cal mode - adi_apollo_cfg_clk_cond_cal_data_set: Load cal data to device - adi_apollo_cfg_clk_cond_cal_data_get: Read cal data from device - adi_apollo_cfg_clk_cond_cal_data_len_get: Get cal data size (120 bytes) New enum adi_apollo_sysclock_cond_cfg_e provides configuration options: - SYSCLKCONDITIONING_ENABLED: Run clock conditioning calibration - SYSCLKCONDITIONING_DISABLED: No clock conditioning calibration - SYSCLKCONDITIONING_ENABLED_WARMBOOT_FROM_USER: Run cal with user data - SYSCLKCONDITIONING_DISABLED_WARMBOOT_FROM_USER: Skip cal, use user data Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
It was also causing build errors given that the function was being defined as global but without a prototype. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Fixed warnings that are relevant for the kernel build and are treated as errors: * Variable length array (-Werror=vla) * Implicit enum conversion (-Werror=enum-conversion) * Missing prototypes (-Werror=missing-prototypes) * 'static' is not at beginning of declaration (-Werror=old-style-declaration) Signed-off-by: Nuno Sá <nuno.sa@analog.com>
The Apollo mixed signal front-end (MxFE®) is a highly integrated device with a 16-bit, 28GSPS maximum sample rate, RF digital-to analog converter (DAC) core, and 12-bit, 20GSPS maximum sample rate, RF analog-to-digital converter (ADC) core. The AD9084 supports four transmitter channels and four receiver channels. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add support to Fast Frequency Hopping Signed-off-by: Jorge Marques <jorge.marques@analog.com>
Add IIO driver for the AD9084 Buffer Memory (BMEM) interface which provides high-speed data capture from the device's internal SRAM buffers. The AD9084 contains multiple BMEM instances (A0, A1, B0, B1) each with 128KB of SRAM that can capture samples from the HSDIN/ADC data path. This driver exposes these as IIO channels with triggered buffer support. Key features: - 4 IIO voltage channels mapped to BMEM instances A0/A1/B0/B1 - Configurable 16-bit or 32-bit sample sizes - Programmable capture address ranges (0-32K words) - Per-channel delay sample configuration - Delay hop support with 4 profiles for timing control - Continuous capture mode using delayed workqueues - Per-channel buffer allocation and demultiplexing - RX MUX configuration for proper ADC routing The driver implements the IIO buffer interface, allowing userspace applications to enable channels and read captured samples through the standard IIO buffer mechanism. Capture is triggered via the Apollo trigger subsystem and samples are read via SPI/HSCI access to the BMEM SRAM. Configuration is exposed through: - IIO sysfs: sampling_frequency, delay configuration per channel - Debugfs: bmem_sel, start/end addresses, sample_size, delay_start The driver uses the Apollo API (adi_apollo_bmem_*) for hardware configuration and follows the standard IIO buffer setup pattern with postenable/predisable callbacks. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
This patch introduces support for configuring BMEM sample delays for
both CDDC and FDDC paths on the AD9088 device. It adds new IIO
extended attributes:
- main_bmem_sample_delay (CDDC)
- channel_bmem_sample_delay (FDDC)
These attributes allow reading and writing sample delay values via
sysfs. The implementation includes:
* Validation of device tree properties (adi,cddc-bmem-sample-delay-en
and adi,fddc-bmem-sample-delay-en).
* Range clamping (0–4095 for CDDC, 0–255 for FDDC).
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Implement a complete calibration data management system that allows saving and restoring all device calibration data across power cycles. Features: - Structured binary file format with header, sections, and CRC32 - Saves ADC, DAC, SERDES RX, and SERDES TX calibration data - Supports both 4T4R and 8T8R device configurations - Validates chip ID, device config, and data integrity on restore - Accessible via sysfs bin attribute for easy integration File format (v1): +--------------------+ | Header (64 bytes) | <- Magic, version, chip ID, offsets, sizes +--------------------+ | ADC Cal Data | <- Sequential + random modes for all ADCs +--------------------+ | DAC Cal Data | <- All DAC channels +--------------------+ | SERDES RX Cal Data | <- All SERDES RX 12-packs +--------------------+ | SERDES TX Cal Data | <- All SERDES TX 12-packs +--------------------+ | CRC32 (4 bytes) | <- Integrity checksum +--------------------+ Sysfs interface: /sys/bus/spi/devices/spi*.*/iio:device*/calibration_data Usage: # Save calibration data cat .../calibration_data > /lib/firmware/ad9088_cal.bin # Restore calibration data cat /lib/firmware/ad9088_cal.bin > .../calibration_data Implementation details: 1. ad9088_cal.c: - ad9088_cal_save(): Reads all calibration data from hardware - ad9088_cal_restore(): Writes calibration data back to hardware - Uses API functions from adi_apollo_cfg.c for data access - Comprehensive validation and error checking 2. ad9088.c: - ad9088_cal_data_read(): Sysfs read handler - ad9088_cal_data_write(): Sysfs restore handler - Caches calibration data for multiple reads - Mutex protection for thread safety 3. File format features: - Magic number (0x41443930 = "AD90") for validation - Version field for future compatibility - Per-section offsets and sizes for flexible parsing - Device-specific metadata (chip ID, 4T4R/8T8R config) - CRC32 checksum for data integrity Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Add a new debugfs related interface: - PRBS generator and checker configuration - 2D eye scan functionality - Device info queries (API version, UUID, die ID, chip info, temp) - HSCI enable control - JTX lane drive swing and emphasis controls - JRX phase adjustment calculation - MCS tracking status/validation Functions exported for use by debugfs: - ad9088_print_sysref_phase() New function in ad9088_debugfs.c: - ad9088_debugfs_register() - ad9088_status_show() - ad9088_mcs_track_cal_status_print() - ad9088_mcs_tracking_cal_validate() Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Added the defconfig for the ADSY1100 VPX card. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add configuration for AD9084 Versal based projects. Signed-off-by: Ciprian Hegbeli <ciprian.hegbeli@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Add default config for microblaze apollo builds. While at it, add a small update on the base microblaze defconfig. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
A command-line utility for inspecting and validating AD9088 calibration data files. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Nuno Sá <nuno.sa@analog.com>
ad9088_cal_dump is a tool that's not normally compiled. Hence ignore it for our relevant ci builds. Signed-off-by: Nuno Sá <nuno.sa@analog.com>
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| #include "../../adc/cf_axi_adc.h" | ||
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| #include <dt-bindings/iio/adc/adi,ad9088.h> | ||
| #include "../../../misc/adi-axi-hsci.h" |
Collaborator
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I think we should try not to use relative paths, same for #include "../../adc/cf_axi_adc.h"
| dev_dbg(&phy->spi->dev, "%s: ftw=%llx, frac_a=%llu, frac_b=%llu\n", | ||
| __func__, *ftw, *frac_a, *frac_b); | ||
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| return API_CMS_ERROR_OK; |
Collaborator
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Not a big deal, but it is weird to return a constant from the API layer in a Linux driver function. Same for adi_ad9088_calc_nco_freq()
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| /* Check if calibration firmware is available - defer probe if not yet accessible */ | ||
| if (!ret) { | ||
| ret = of_property_read_string(node, "adi,device-calibration-data-name", &name); |
Collaborator
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The previous if (!ret) is overwritten by of_property_read_string() for the calibration name and then the firmware_request_nowarn() is called without checking wether the string read succeeded or not.
| return -EINVAL; | ||
| } | ||
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| /* FIXME ! */ |
Collaborator
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I think this should be explained or removed
| serdes = ADI_APOLLO_TXRX_SERDES_12PACK_B; | ||
| break; | ||
| default: | ||
| serdes = ADI_APOLLO_TXRX_SERDES_12PACK_NONE | ADI_APOLLO_TXRX_SERDES_12PACK_NONE; |
Collaborator
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coccicheck might be right: this is a duplicate argument.
| * | ||
| * trig_sync is not self-clearing | ||
| */ | ||
| ret = adi_apollo_clk_mcs_trig_sync_enable(device, 0); |
Collaborator
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the comment says that the trig_sync is set to 1, but there are two adi_apollo_clk_mcs_trig_sync_enable(device, 0); calls.
| writew(cpu_to_be16(buf16[i]), conf->base + IP_DATA_REG); | ||
| break; | ||
| case ID_ADI_32_SELMAP: | ||
| for (i = 0; i < (count/4)+1; ++i) |
Collaborator
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possible out of bounds because of +1 in case of a buffer of count bytes.
| type: boolean | ||
| description: Enable real TX channel mode (complex if not present). | ||
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| adi,side-b-use-seperate-tpl-en: |
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| void axi_aion_trig_manual_trigger(void) | ||
| { | ||
| regmap_write(st_global->regmap, AION_MANUAL_TRIGGER, 1); |
Collaborator
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can st_global be NULL if probe fails? There is no guard.
Can axi_aion_trig_manual_trigger() be called from another module after the memory is freed?
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PR Description
This adds support for apollo (ad9088/ad9084) into main. This is rather big patchseries that's the result of months of work in a dev branch. Arguably we should have done this another way but it is what it is now. Not really expecting that anyone can review all of this 😅
CI should be mostly passing (there are still tons of warnings in checkpatch though). I'm anyways rushing things a bit because I'll be off next week and we might want to merge this asap. Hence, I'll remove it from draft.
If not merged when I'm back, I'll, at least, better cleanup coding style.
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