Add support for ADMX100X on ZedBoard

docs/projects/admx100x_evb/index.rst

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+.. _admx100x_evb:
+
+ADMX100X-EVB HDL project
+===============================================================================
+
+Overview
+-------------------------------------------------------------------------------
+
+The :adi:`EVAL-ADMX1001` and :adi:`EVAL-ADMX1002` modules are
+ultra-low-distortion, low-noise signal generators. They support output
+frequencies up to 40 kHz when the digital  pre-distortion (DPD) algorithm is
+disabled, and up to 20 kHz with DPD enabled while maintaining a typical total
+harmonic distortion (THD) of −130 dB at 1 kHz. The ADMX1001 includes a built-in
+acquisition channel that enables simultaneous generation and capture of
+differential signals, making it ideal for characterization and closed-loop
+evaluation of high-performance ADCs, audio converters, and precision sensing
+systems. The integrated DPD algorithm minimizes distortion typically introduced
+by DAC and amplifier stages, enabling the generation of extremely clean test
+signals for precision measurement applications. The ADMX1002 focuses solely on
+high-fidelity signal generation, providing a streamlined solution for setups
+where local signal acquisition is not required. Note that in the current HDL
+release, only the TX path is implemented and supported.
+
+Supported boards
+-------------------------------------------------------------------------------
+
+- :adi:`EVAL-ADMX1001`
+- :adi:`EVAL-ADMX1002`
+
+Supported devices
+-------------------------------------------------------------------------------
+
+- :adi:`AD5683R`
+
+Supported carriers
+-------------------------------------------------------------------------------
+
+.. list-table::
+   :widths: 35 35 30
+   :header-rows: 1
+
+   * - Evaluation board
+     - Carrier
+     - FMC slot
+   * - EVAL-ADMX1001
+     - `ZedBoard <https://digilent.com/shop/zedboard-zynq-7000-arm-fpga-soc-development-board>`__
+     - FMC LPC
+   * - EVAL-ADMX1002
+     - `ZedBoard <https://digilent.com/shop/zedboard-zynq-7000-arm-fpga-soc-development-board>`__
+     - FMC LPC
+
+Block design
+-------------------------------------------------------------------------------
+
+.. warning::
+
+    The VADJ for the Zedboard must be set to 3.3V.
+
+Block diagram
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The data path and clock domains are depicted in the below diagram:
+
+.. image:: admx100x-evb.svg
+   :width: 800
+   :align: center
+   :alt: ADMX100X/ZedBoard block diagram
+
+SPI connections
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. list-table::
+   :widths: 25 25 25 25
+   :header-rows: 1
+
+   * - SPI type
+     - SPI manager instance
+     - SPI subordinate
+     - CS
+   * - PS
+     - SPI 0
+     - CS_DAC
+     - 0
+   * - PS
+     - SPI 0
+     - CS_FPGA
+     - 0
+
+GPIOs
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. list-table::
+   :widths: 25 25 25 25
+   :header-rows: 2
+
+   * - GPIO signal
+     - Direction
+     - HDL GPIO EMIO
+     - Software GPIO
+   * -
+     - (from FPGA view)
+     -
+     - Zynq-7000
+   * - ADMX100X_SYNC_MODE
+     - OUT
+     - 34
+     - 88
+   * - ADMX100X_EN
+     - OUT
+     - 35
+     - 89
+   * - ADMX100X_CAL
+     - OUT
+     - 38
+     - 92
+   * - ADMX100X_TRIG
+     - OUT
+     - 40
+     - 94
+   * - ADMX100X_DAC_LDAC
+     - OUT
+     - 39
+     - 93
+   * - ADMX100X_RESET
+     - OUT
+     - 33
+     - 87
+   * - ADMX100X_READY
+     - IN
+     - 36
+     - 90
+   * - ADMX100X_VALID
+     - IN
+     - 37
+     - 91
+   * - ADMX100X_OT
+     - IN
+     - 32
+     - 86
+
+Building the HDL project
+-------------------------------------------------------------------------------
+
+The design is built upon ADI's generic HDL reference design framework. ADI
+distributes the bit/elf files of these projects as part of the :dokuwiki:`ADI
+Kuiper Linux <resources/tools-software/linux-software/kuiper-linux>`. If you
+want to build the sources, ADI makes them available on the :git-hdl:`HDL
+repository </>`. To get the source you must `clone
+<https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__ the HDL
+repository.
+
+**Linux/Cygwin/WSL**
+
+Building the ZedBoard project:
+
+.. shell:: bash
+
+   $cd hdl/projects/admx100xevb/zed
+   $make
+
+A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
+
+Resources
+-------------------------------------------------------------------------------
+
+Hardware related
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- Product datasheets:
+
+  - :adi:`AD5683R`
+
+HDL related
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- :git-hdl:`ADMX100X-EVB HDL project source code <projects/admx100x_evb>`
+
+.. list-table::
+   :widths: 30 35 35
+   :header-rows: 1
+
+   * - IP name
+     - Source code link
+     - Documentation link
+   * - AXI_CLKGEN
+     - :git-hdl:`library/axi_clkgen`
+     - :ref:`axi_clkgen`
+   * - AXI_DMAC
+     - :git-hdl:`library/axi_dmac`
+     - :ref:`axi_dmac`
+   * - AXI_HDMI_TX
+     - :git-hdl:`library/axi_hdmi_tx`
+     - :ref:`axi_hdmi_tx`
+   * - AXI_I2S_ADI
+     - :git-hdl:`library/axi_i2s_adi`
+     - ---
+   * - AXI_SPDIF_TX
+     - :git-hdl:`library/axi_spdif_tx`
+     - ---
+   * - AXI_SYSID
+     - :git-hdl:`library/axi_sysid`
+     - :ref:`axi_sysid`
+   * - SYSID_ROM
+     - :git-hdl:`library/sysid_rom`
+     - :ref:`axi_sysid`
+   * - UTIL_I2C_MIXER
+     - :git-hdl:`library/util_i2c_mixer`
+     - ---
+
+.. include:: ../common/more_information.rst
+
+.. include:: ../common/support.rst

projects/admx100x_evb/Makefile

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+####################################################################################
+## Copyright (c) 2018 - 2025 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+include ../scripts/project-toplevel.mk

projects/admx100x_evb/README.md

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+# ADMX100X-EVB HDL Project
+
+- Evaluation boards product page:
+  - [EVAL-ADMX1001](https://www.analog.com/eval-admx1001)
+  - [EVAL-ADMX1002](https://www.analog.com/eval-admx1002)
+- System documentation: TO BE ADDED
+- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/admx100xevb/index.html
+- Evaluation board VADJ: 3.3V
+
+## Supported parts
+
+| Part name                                      | Description                                                                     |
+|------------------------------------------------|---------------------------------------------------------------------------------|
+| [AD5683R](https://www.analog.com/ad5683r)      | Tiny 16-Bit SPI nanoDAC+, with ±2 (16-Bit) LSB INL and 2 ppm/°C Reference       |
+
+## Building the project
+
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/admx100x_evb/zed/Makefile

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+####################################################################################
+## Copyright (c) 2018 - 2025 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+PROJECT_NAME := admx100x_evb_zed
+
+M_DEPS += ../common/admx100xevb_bd.tcl
+M_DEPS += ../../scripts/adi_pd.tcl
+M_DEPS += ../../common/zed/zed_system_constr.xdc
+M_DEPS += ../../common/zed/zed_system_bd.tcl
+M_DEPS += ../../../library/xilinx/common/ad_data_clk.v
+M_DEPS += ../../../library/common/ad_iobuf.v
+
+LIB_DEPS += axi_clkgen
+LIB_DEPS += axi_dmac
+LIB_DEPS += axi_hdmi_tx
+LIB_DEPS += axi_i2s_adi
+LIB_DEPS += axi_spdif_tx
+LIB_DEPS += axi_sysid
+LIB_DEPS += sysid_rom
+LIB_DEPS += util_i2c_mixer
+
+include ../../scripts/project-xilinx.mk

projects/admx100x_evb/zed/README.md

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+<!-- no_build_example, no_dts, no_no_os -->
+
+# ADMX100X-EVB/ZED HDL Project
+
+- VADJ with which it was tested in hardware: 3.3V
+
+## Building the project
+
+```
+cd projects/admx100x_evb/zed
+make
+```

projects/admx100x_evb/zed/system_bd.tcl

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+###############################################################################
+## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
+source $ad_hdl_dir/projects/scripts/adi_pd.tcl
+
+#system ID
+ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
+ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt"
+ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
+
+sysid_gen_sys_init_file
+
+source ../common/admx100xevb_bd.tcl

projects/admx100x_evb/zed/system_constr.xdc

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+###############################################################################
+## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+# SPI interface
+
+set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS33}                 [get_ports admx100x_spi_sclk]; ## D17   FMC_LA13_P
+set_property -dict {PACKAGE_PIN K20 IOSTANDARD LVCMOS33}                 [get_ports admx100x_spi_miso]; ## C19   FMC_LA14_N
+set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS33}                 [get_ports admx100x_spi_mosi]; ## H19   FMC_LA15_P
+set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS33}                 [get_ports admx100x_spi_cs_0]; ## G18   FMC_LA16_P  CS_FPGA
+set_property -dict {PACKAGE_PIN D22 IOSTANDARD LVCMOS33}                 [get_ports admx100x_spi_cs_1]; ## G27   FMC_LA25_P  CS_DAC
+
+# reset and GPIO signal
+
+set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS33}                 [get_ports admx100x_reset];    ##G24   FMC_LA22_P  DAC_RESET
+set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS33}                 [get_ports admx100x_en];       ##C14   FMC_LA10_P
+set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVCMOS33}                 [get_ports admx100x_ready];    ##D14   FMC_LA09_P
+set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS33}                 [get_ports admx100x_valid];    ##G12   FMC_LA08_P
+set_property -dict {PACKAGE_PIN E21 IOSTANDARD LVCMOS33}                 [get_ports admx100x_cal];      ##C26   FMC_LA27_P
+set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS33}                 [get_ports admx100x_dac_ldac]; ##G21   FMC_LA20_P
+set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS33}                 [get_ports admx100x_trig];     ##H13   FMC_LA07_P
+set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS33}                 [get_ports admx100x_ot];       ##H16   FMC_LA11_P
+
+# syncronization
+set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS33}                 [get_ports admx100x_sync_mode]; ##H22  FMC_LA19_P  SYNC_MODE
+
+# set IOSTANDARD according to VADJ 3.3V
+
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports otg_vbusoc]
+
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[0]]       ; ## BTNC
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[1]]       ; ## BTND
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[2]]       ; ## BTNL
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[3]]       ; ## BTNR
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[4]]       ; ## BTNU
+
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[11]]      ; ## SW0
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[12]]      ; ## SW1
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[13]]      ; ## SW2
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[14]]      ; ## SW3
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[15]]      ; ## SW4
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[16]]      ; ## SW5
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[17]]      ; ## SW6
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[18]]      ; ## SW7
+
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[27]]      ; ## XADC-GIO0
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[28]]      ; ## XADC-GIO1
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[29]]      ; ## XADC-GIO2
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[30]]      ; ## XADC-GIO3
+
+set_property  -dict {IOSTANDARD LVCMOS33} [get_ports gpio_bd[31]]      ; ## OTG-RESETN

projects/admx100x_evb/zed/system_project.tcl

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+###############################################################################
+## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source ../../../scripts/adi_env.tcl
+source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
+source $ad_hdl_dir/projects/scripts/adi_board.tcl
+
+adi_project admx100x_evb_zed
+
+adi_project_files admx100x_evb_zed [list \
+    "$ad_hdl_dir/library/common/ad_iobuf.v" \
+    "$ad_hdl_dir/library/xilinx/common/ad_data_clk.v" \
+    "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" \
+    "system_constr.xdc" \
+    "system_top.v"]
+
+adi_project_run admx100x_evb_zed