fix: false sharing in SPSC ring#34
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head and tail in the SPSC rings were sharing the same cache line. Writes would invalidate on the other core, causing cache-line bounces on each operation. Now the two variables have been aligned in different cache lines.
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head and tail in the SPSC rings were sharing the same cache line.
Writes would invalidate on the other core, causing cache-line bounces on each operation. Now the two variables have been aligned in different cache lines.