[docs][libcpu][arm][cortex-a] update comment for start_gcc.S

[laidene]

拉取/合并请求描述：(PR description)

[

为什么提交这份PR (why to submit this PR)

我认为注释不够准确,所以修改部分注释。

你的解决方案是什么 (what is your solution)

1 删除不必要的注释。
2 优化我认为可以详细的注释。
3 添加部分注释。

请提供验证的bsp和config (provide the config and bsp)

• BSP: none
• .config: none
• action: none

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

• 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
• 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality：

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

• 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
• 代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
• 没有垃圾代码，代码尽量精简，不包含#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
• 所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
• 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
• 代码是高质量的 Code in this PR is of high quality
• 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification
• 如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

改动声明

1 删除不必要的注释

我认为这些注释是不必要的，因为只是对语法的解释。所以删除掉了。

    mov r0,#0                   /* get a zero      */
    bic r0, r0, #0x7                    /* clear bit1~3 */

2 优化我认为可以详细的注释

我觉得宏定义的注释可以更详细，所以修改如下

/* 更改前 */

/*Load the physical address of a symbol into a register. 
  Through pv_off calculates the offset of the physical address */
.macro get_phy, reg, symbol, _pvoff
    ldr \reg, =\symbol
    add \reg, \_pvoff
.endm
/*Calculate the offset between the physical address and the virtual address of the "_reset".*/
.macro get_pvoff, tmp, out
    ldr     \tmp, =_reset
    adr     \out, _reset
    sub     \out, \out, \tmp
.endm

/* 更改后 */

/**
 * @brief get the physical address of the symbol
 *
 * @param reg register to store the physical address
 * @param symbol symbol name
 * @param _pvoff the offset between the physical address and the virtual address
 */
.macro get_phy, reg, symbol, _pvoff
    ldr \reg, =\symbol
    add \reg, \_pvoff
.endm

/**
 * @brief calculate the offset between the physical address and the virtual address of the "_reset"
 *
 * @param tmp register which will be used to store the virtual address of the "_reset"
 * @param out register which will be used to store the pv_off (paddr - vaddr)
 */
.macro get_pvoff, tmp, out
    ldr     \tmp, =_reset
    adr     \out, _reset
    sub     \out, \out, \tmp
.endm

还有我认为不准确的注释。
这部分的作用是先禁用MMU,然后再失效TLB I-cache和分支预测。
但是原注释的内容是 /* invalid tlb before enable mmu */ 在使能MMU前失效TLB。
我认为不准确。

/* 更改前 */



    /* invalid tlb before enable mmu */
    mrc p15, 0, r0, c1, c0, 0
    bic r0, #1
    mcr p15, 0, r0, c1, c0, 0
    dsb
    isb

    mov r0, #0
    mcr p15, 0, r0, c8, c7, 0
    mcr p15, 0, r0, c7, c5, 0    /* iciallu */
    mcr p15, 0, r0, c7, c5, 6    /* bpiall */
    dsb
    isb

/* 更改后 */

    /* disable MMU  */
    mrc p15, 0, r0, c1, c0, 0   /* SCTLR */
    bic r0, #1                  /* M=0 */
    mcr p15, 0, r0, c1, c0, 0
    dsb
    isb

    /* invalidate TLB, I-cache and branch predictor */
    mov r0, #0
    mcr p15, 0, r0, c8, c7, 0    /* ITLBIALL */
    mcr p15, 0, r0, c7, c5, 0    /* ICIALLU */
    mcr p15, 0, r0, c7, c5, 6    /* BPIALL */
    dsb
    isb

3 添加部分注释

在CP15寄存器组的旁边加上操作的寄存器名称。
对于CPACR和MPIDR这种有多种实现的寄存器，读写值不添加注释。
对于SCTLR这种通用的寄存器，写入值时添加写入了具体字段。

    mov r4, #0xfffffff
    mcr p15, 0, r4, c1, c0, 2   /* CPACR */


    mcr p15, 0, r0, c8, c7, 0           /* ITLBIALL */
    mcr p15, 0, r0, c7, c5, 0           /* ICIALLU */
    mcr p15, 0, r0, c7, c5, 6           /* BPIALL */


    mrc p15, 0, r0, c1, c0, 0   /* SCTLR */
    bic r0, #1                  /* M=0 */


    /* set all domains with client mode */
    ldr     r0,=#0x55555555         /* client */
    mcr     p15, #0, r0, c3, c0, #0 /* DACR */


 /*
 * void rt_hw_mmu_switch(rt_uint32_t* mmutable_p);
 * r0 --> mmutable_p (mmu table address)
 */
.global rt_hw_mmu_switch
rt_hw_mmu_switch:
    orr r0, #0x18                   /* RGN=0b11 (Outer WB-WA) */
    mcr p15, 0, r0, c2, c0, 0       /* TTBR0 */

    /* invalidate TLB, I-cache and branch predictor */
    mov r0, #0
    mcr p15, 0, r0, c8, c7, 0       /* ITLBIALL */
    mcr p15, 0, r0, c7, c5, 0       /* ICIALLU */
    mcr p15, 0, r0, c7, c5, 6       /* BPIALL */

    dsb
    isb
    mov pc, lr

测试

纯注释修改

[github-actions]

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