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1. OSH-library OSH-library Public

   Implementation of hardware cores—including encryption, PRNGs, DSP modules, and accelerators—developed in pure Verilog for reference. Each design is validated against official specifications and sup…

   Verilog 53 6

2. SUBLEQ-CPU SUBLEQ-CPU Public

   Minimal SUBLEQ CPU in both Verilog and VHDL, Guide to build your own SUBLEQ CPU.

   VHDL 1

3. picosoc-peripherals picosoc-peripherals Public

   Reusable memory-mapped peripherals for PicoSoC/PicoRV32, designed for FPGA and ASIC development. Includes GPIO, PWM, timers, and other modular IP cores with documentation and integration examples.

   Verilog 2