[Feature] Add a wizard for two level inverter filters calculation.

[jalinei]

So far the proposed wizard would permit designing inductors for L, LC, and LCL filters.
The feature proposal is linked with the topology extension for MAS proposed under :
OpenMagnetics/MAS#18

The MAS twoLevelInverter topology permits to defines all parameters linked with the system above.

In the MKF, I propose a draft solver to find the design constraints on the magnetic of the filter in order to be able to size them using OpenMagnetics.

The current proposal first determine the inverter reference, using different state of the art modulation technics such as SPWM, SVPWM, or THIPWM.

Then PWM carrier are computed (either Sawtooth or Triangular are supported).

Then we compute the comparison of the reference and the carrier, and we deal with dead-time and rise-time of the switches.

This gives the voltage waveform for each switching node of the inverter.

Then, depending on the filter topology, we compute the voltage drop across the first inductor, and the current flowing in the first inductor.

From that, we derive the harmonics using a simple DFT.

The harmonics are fed to OM to compute magnetic losses, encompassing both fundamental frequencies and switching frequencies.

Self-criticism and TODOs:

• not taking DC Bus ripple in consideration so far which has huge impact on low freq harmonics.
• could be improved to be more explicit if inverter is a 3phase one, or a single phase (not the same impact from DC Ripple)
• Not yet possible to derive constraints for the second inductor.
• Not reusing already implemented FFT features
• Figure out linker error
• Not tested

[jalinei]

Not sure how to deal with the DC Bus fluctuation.

One flow would be the following :

• build all three sa/sb/sc and va/vb/vc with constant Vdc,
• solve per-harmonic to get iL1 & (optionally) vNode phasors,
• reconstruct time v and i, compute p(t), map through Zdc to vdc(t),
• remodulate va/vb/vc with vdc(t), FFT again, re-solve filter per harmonic → final output that contains both switching and dc bus harmonics.

[jalinei]

I've added multiple tests cases and a special debug class.

Debug plots must be compiled with a special cmake flag
From build/ folder :
cmake -DDEBUG_PLOTS=ON ..

Then test cases can be called like any other tests.

[sonarqubecloud]

Quality Gate failed

Failed conditions
15.6% Duplication on New Code (required ≤ 3%)

See analysis details on SonarQube Cloud