Add SMBus HAL, dependent on `embedded-hal-async::I2c` by tullom · Pull Request #7 · OpenDevicePartnership/embedded-mcu

tullom · 2025-11-24T10:05:24Z

Add SMBus support in the form of a helper trait built on top of an embedded-hal-async I2C implementation.

github-actions · 2025-11-24T10:08:24Z

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kurtjd

I think Robert's comments are a good idea but otherwise looks good.

jerrysxie · 2026-02-04T17:27:42Z

@tullom This looks fine to me as long as some of Robert's comments are addressed. I would like to see a demonstration of this on one of the charger/fuel gage driver. Put it in action is good way to iron out the kinks.

Non-blocking: Another consideration would be to use embedded-hal i2c mock to unit test some of the default implementation. Please create an issue for this.

Copilot

Pull request overview

Adds an SMBus helper API to embedded-mcu-hal, implemented as an async trait layered on top of embedded-hal-async::i2c::I2c, along with the dependency and cargo-vet metadata updates needed to consume embedded-hal/embedded-hal-async.

Changes:

Introduces a new smbus module with shared SMBus error types and an async SMBus helper trait (Smbus) built on embedded-hal-async I2C operations.
Adds embedded-hal + embedded-hal-async dependencies and wires defmt feature integration for embedded-hal.
Updates Cargo.lock and cargo-vet audit/import lockfiles for the new crates.

Reviewed changes

Copilot reviewed 6 out of 8 changed files in this pull request and generated 9 comments.

Show a summary per file

File	Description
supply-chain/imports.lock	Adds/imports cargo-vet entries for `embedded-hal` and `embedded-hal-async`; includes minor note formatting changes.
supply-chain/audits.toml	Adds a cargo-vet audit entry for `defmt` 0.3.x.
embedded-mcu-hal/src/lib.rs	Exposes the new `smbus` module from the crate root.
embedded-mcu-hal/Cargo.toml	Adds `embedded-hal`/`embedded-hal-async` deps and extends the `defmt` feature to enable `embedded-hal` defmt support.
Cargo.lock	Locks new dependencies (`embedded-hal`, `embedded-hal-async`, and `defmt` 0.3.x).
embedded-mcu-hal/src/smbus/mod.rs	Adds the `smbus` module root.
embedded-mcu-hal/src/smbus/bus/mod.rs	Defines SMBus error traits/types (`Error`, `ErrorKind`, `ErrorType`).
embedded-mcu-hal/src/smbus/bus/asynch.rs	Implements the async SMBus helper trait with PEC support and SMBus read/write/process/block operations.

Copilot

Pull request overview

Copilot reviewed 6 out of 8 changed files in this pull request and generated 9 comments.

Comments suppressed due to low confidence (4)

embedded-mcu-hal/src/smbus/bus/asynch.rs:354

finalize_pec_byte uses try_into() which fails if the hasher's finish() value doesn't fit into u8. Earlier docs state that the PEC is the truncated low byte of finish(), so this should explicitly truncate/mask instead of erroring on larger u64 values.

    /// Truncate a finished PEC value to its low byte.
    fn finalize_pec_byte(pec: u64) -> Result<u8, crate::smbus::bus::ErrorKind> {
        pec.try_into().map_err(|_| crate::smbus::bus::ErrorKind::Pec)
    }

embedded-mcu-hal/src/smbus/bus/asynch.rs:629

block_write is implemented as a transaction with multiple Operation::Write steps (register, length, payload, PEC). This will generally insert repeated STARTs/address bytes between chunks, which is not equivalent to an SMBus block write frame and will also break PEC calculation. Build a single contiguous write buffer for the whole write phase (register + len + data [+ pec]) and send it as one write op.

            self.i2c
                .transaction(
                    address,
                    &mut [
                        Operation::Write(&[register]),
                        Operation::Write(&[data.len() as u8]),
                        Operation::Write(data),
                        Operation::Write(&[pec]),
                    ],
                )

embedded-mcu-hal/src/smbus/bus/asynch.rs:725

block_write_block_read_process_call is executed as many separate write/read operations inside a single transaction. This will generally introduce extra repeated STARTs/address bytes between operations, changing the SMBus wire sequence and PEC inputs (similar to process_call and block_read). Restructure to a single contiguous write op for the write phase and a single contiguous read op for the read phase (then parse length/data/pec).

            self.i2c
                .transaction(
                    address,
                    &mut [
                        Operation::Write(&[register]),
                        Operation::Write(&[write_data.len() as u8]),
                        Operation::Write(write_data),
                        Operation::Read(&mut read_msg_size),
                        Operation::Read(read_data),
                        Operation::Read(&mut pec_buf),
                    ],
                )

embedded-mcu-hal/src/smbus/bus/mod.rs:160

The ErrorType trait is documented as "I2C error type trait" even though it is defining the error type for the SMBus traits in this module. Updating the wording will avoid confusion for HAL/driver authors implementing this API.

/// I2C error type trait.
///
/// This just defines the error type, to be used by the other traits.
pub trait ErrorType {
    /// Error type
    type Error: Error + From<embedded_hal_async::i2c::ErrorKind>;
}

+//! Async SMBus controller trait and software implementation.
+//!
+//! This module defines the [`Smbus`] async controller trait describing the
+//! SMBus protocol surface. The trait declares the protocol-level
+//! operations as required methods plus two associated items â€”
+//! [`Smbus::PecCalc`] and [`Smbus::get_pec_calc`] â€” and a


+use crate::smbus::bus::Error as SMBusError;
+use embedded_hal_async::i2c::{Error as I2cError, I2c, Operation};


+        computed_pec
+            .eq(&received_pec.into())


+        if use_pec {
+            let mut pec = Self::pec_calc_with_write_addr(address)?;
+            self.i2c
+                .read(address, read)
+                .await
+                .map_err(|e| crate::smbus::bus::ErrorKind::from(e.kind()))?;
+            let (pec_byte, rest) = read.split_last().ok_or(crate::smbus::bus::ErrorKind::Pec)?;
+            pec.write(rest);
+            <Self as Smbus>::check_pec(*pec_byte, pec.finish())?;
+        } else {


+            let mut buf = [0u8; 3];
+            let mut pec = Self::pec_calc_with_write_addr(address)?;
+            pec.write_u8(register);
+            pec.write_u16(word);


+        let mut msg_size = [0u8];
+        if use_pec {
+            let mut pec_buf = [0u8];
+            let mut pec = Self::pec_calc_with_write_addr(address)?;
+            pec.write_u8(register);
+            pec.write_u8(crate::smbus::bus::read_address_byte(address));
+            self.i2c
+                .transaction(
+                    address,
+                    &mut [
+                        Operation::Write(&[register]),
+                        Operation::Read(&mut msg_size),
+                        Operation::Read(data),
+                        Operation::Read(&mut pec_buf),
+                    ],
+                )
+                .await
+                .map_err(|e| crate::smbus::bus::ErrorKind::from(e.kind()))?;
+            pec.write(&msg_size);
+            pec.write(data);
+            Self::check_pec(pec_buf[0], pec.finish())?;
+        } else {
+            self.i2c
+                .transaction(
+                    address,
+                    &mut [
+                        Operation::Write(&[register]),
+                        Operation::Read(&mut msg_size),
+                        Operation::Read(data),
+                    ],
+                )
+                .await
+                .map_err(|e| crate::smbus::bus::ErrorKind::from(e.kind()))?;
+        }
+        Ok(())


Split the async SMBus surface into an abstract protocol trait and a concrete software implementation. The `Smbus` trait now declares only the SMBus protocol operations plus the PEC associated items (`PecCalc`, `get_pec_calc`, `check_pec`). All default implementations that bit-bang the protocol on top of an I²C bus have moved into a new `SwSmbusI2c<I, P>` wrapper struct that owns an `embedded_hal_async::i2c::I2c` bus and delegates PEC calculator construction to a new `PecProvider` trait via the `P` parameter. HALs with a hardware SMBus peripheral can implement `Smbus` directly without inheriting any I²C-specific machinery. `write_buf`, `read_buf`, and `write_read_buf` are no longer trait methods; they are inherent helpers on `SwSmbusI2c` that the other protocol methods reuse, eliminating duplicated PEC setup and I²C error mapping across the byte/word/block operations. PEC calculator priming with the write-address byte and the truncation of the finished hash to a single byte are likewise factored into private helpers (`pec_calc_with_write_addr`, `finalize_pec_byte`). The blanket `impl<T: Smbus + ?Sized> Smbus for &mut T` forwarding impl is preserved, and `SwSmbusI2c::Error` is `ErrorKind` directly so callers do not need to define a wrapper error type. Tests are reworked to drive `SwSmbusI2c<I2cMock, _>` through small `PecProvider` impls (`TestPec`, `NoPec`). Assisted-by: GitHub Copilot:claude-opus-4.7

felipebalbi · 2025-11-25T05:16:48Z

+///         }
+///     }
+///
+///     fn to_kind(kind: crate::smbus::bus::ErrorKind) -> Self {


Looks more like a from_kind

felipebalbi · 2026-05-14T15:54:00Z

+        &mut self,
+        address: u8,
+        byte: u8,
+        use_pec: bool,


How about making the API explicit? That is, send_byte() and send_byte_with_pec()

RobertZ2011

Nothing to add on top of the existing comments.

kurtjd

Looks good (though Copilot suggestions seem like they might be valid).

tullom self-assigned this Nov 24, 2025

tullom requested a review from a team as a code owner November 24, 2025 10:05

tullom added this to ODP Backlog Nov 24, 2025

tullom added the enhancement New feature or request label Nov 24, 2025

tullom requested review from JamesHuard, RobertZ2011, jerrysxie and madeleyneVaca November 24, 2025 10:05

github-actions Bot added the cargo vet label Nov 24, 2025

jeffglaum moved this to In review in ODP Backlog Nov 24, 2025

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Comment thread embedded-mcu-hal/src/smbus/bus/asynch.rs Outdated

tullom requested a review from RobertZ2011 November 24, 2025 19:32

tullom requested a review from a team as a code owner November 24, 2025 19:37

tullom requested review from felipebalbi and kurtjd November 25, 2025 05:09

RobertZ2011 requested changes Nov 25, 2025

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Comment thread embedded-mcu-hal/src/smbus/bus/asynch.rs Outdated

kurtjd previously approved these changes Nov 25, 2025

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tullom dismissed kurtjd’s stale review via fd9d759 December 2, 2025 19:18

tullom force-pushed the smbus-hal branch 2 times, most recently from 09cc4af to 28fff71 Compare December 4, 2025 00:40

tullom requested review from RobertZ2011 and kurtjd December 4, 2025 00:40

tullom force-pushed the smbus-hal branch from 28fff71 to bd54ac6 Compare December 4, 2025 00:41

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Comment thread embedded-mcu-hal/src/smbus/bus/asynch.rs Outdated

Comment thread embedded-mcu-hal/src/smbus/bus/asynch.rs Outdated

Comment thread embedded-mcu-hal/src/smbus/bus/asynch.rs Outdated

tullom moved this from In review to Backlog in ODP Backlog Apr 7, 2026

Copilot AI review requested due to automatic review settings May 12, 2026 18:01

tullom force-pushed the smbus-hal branch from bd54ac6 to dc80519 Compare May 12, 2026 18:01

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Add SMBus HAL, dependent on embedded-hal-async::I2c

cfda0e5

tullom force-pushed the smbus-hal branch from dc80519 to cfda0e5 Compare May 12, 2026 18:21

Added unit tests

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tullom requested a review from Copilot May 13, 2026 01:18

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tullom force-pushed the smbus-hal branch from b0519fb to b4af63a Compare May 13, 2026 01:21

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tullom requested a review from RobertZ2011 May 13, 2026 01:26

tullom force-pushed the smbus-hal branch from b4af63a to 7e97bd3 Compare May 13, 2026 01:39

felipebalbi reviewed May 14, 2026

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		use crate::smbus::bus::Error as SMBusError;
		use embedded_hal_async::i2c::{Error as I2cError, I2c, Operation};

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tullom commented Nov 24, 2025

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github-actions Bot commented Nov 24, 2025 •

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