Use the embedded-hal-i2c traits for i2c targets#440
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Main motivators are: - More consistent interface that is better misuse resistant. - Easier to extend with support for Automatic Ack/Nack of addresses in async variant. - Better support for cancelation and capable of better surfacing what the hardware can actually do. The code changes also fixes some issues in 10-bit addressing. It should now match the behaviour specified in UM10204
This is done through the expect_read and expect_write interfaces, as automatic acknowledgement requires the dma to be in place beforehand.
This register contains both write-to-trigger bits and bits that represent semi-permanent state. This commit ensures we don't accidentaly write 1s to the write-to-trigger bits, as the hardware doesn't clear these automatically.
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Note: this pull request is an addition to #389. I can't easily make it display the diff here properly until that PR is merged however. Only the last commit is new.