AMD: libmetal demo - add baremetal support

examples/libmetal/machine/remote/amd_rpu/build_deps.cmake

@@ -0,0 +1,7 @@
+collect(PROJECT_LIB_DEPS c)
+collect(PROJECT_LIB_DEPS xil)
+collect(PROJECT_LIB_DEPS xilpm)
+collect(PROJECT_LIB_DEPS xiltimer)
+collect(PROJECT_LIB_DEPS xilstandalone)
+collect(PROJECT_LIB_DEPS metal)
+collect(PROJECT_LIB_DEPS metal_xlnx_extension)

examples/libmetal/machine/remote/amd_rpu/common.h

@@ -96,7 +96,7 @@
 /* Devices names */
 #define BUS_NAME        "generic"
 #define SHM_DEV_NAME	"3ed80000.shm"
-
+#define SHM_SIZE	0x200000
 #define SHM_BASE_ADDR   0x3ED80000
 
 /* IPI registers offset */

examples/libmetal/machine/remote/amd_rpu/lscript_sdt.ld

@@ -22,12 +22,12 @@ MEMORY
 {
    psu_r5_atcm_MEM_0 : ORIGIN = 0x0, LENGTH = 0x10000
    psu_r5_btcm_MEM_0 : ORIGIN = 0x20000, LENGTH = 0x10000
-   psu_r5_ddr_0_MEM_0 : ORIGIN = 0x3ed00000, LENGTH = 0x80000
+   psu_r5_ddr_0_MEM_0 : ORIGIN = 0x9800100, LENGTH = 0x5ff00
 }
 
 /* Specify the default entry point to the program */
 
-ENTRY(_vector_table)
+ENTRY(_boot)
 
 /* Define the sections, and where they are mapped in memory */
 
@@ -38,6 +38,10 @@ SECTIONS
    *(.boot)
 } > psu_r5_atcm_MEM_0
 
+.bootdata : {
+   *(.bootdata)
+} > psu_r5_atcm_MEM_0
+
 .text : {
    *(.text)
    *(.text.*)
@@ -52,52 +56,57 @@ SECTIONS
    *(.gnu.linkonce.armextab.*)
 } > psu_r5_ddr_0_MEM_0
 
+.note.gnu.build-id : {
+   KEEP (*(.note.gnu.build-id))
+} > psu_r5_ddr_0_MEM_0
+
+
 .init : {
    KEEP (*(.init))
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .fini : {
    KEEP (*(.fini))
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .interp : {
    KEEP (*(.interp))
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .note-ABI-tag : {
    KEEP (*(.note-ABI-tag))
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .rodata : {
    __rodata_start = .;
    *(.rodata)
    *(.rodata.*)
    *(.gnu.linkonce.r.*)
    __rodata_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .rodata1 : {
    __rodata1_start = .;
    *(.rodata1)
    *(.rodata1.*)
    __rodata1_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .sdata2 : {
    __sdata2_start = .;
    *(.sdata2)
    *(.sdata2.*)
    *(.gnu.linkonce.s2.*)
    __sdata2_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .sbss2 : {
    __sbss2_start = .;
    *(.sbss2)
    *(.sbss2.*)
    *(.gnu.linkonce.sb2.*)
    __sbss2_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .data : {
    __data_start = .;
@@ -108,18 +117,18 @@ SECTIONS
    *(.got)
    *(.got.plt)
    __data_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .data1 : {
    __data1_start = .;
    *(.data1)
    *(.data1.*)
    __data1_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .got : {
    *(.got)
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .ctors : {
    __CTOR_LIST__ = .;
@@ -130,7 +139,7 @@ SECTIONS
    KEEP (*(.ctors))
    __CTOR_END__ = .;
    ___CTORS_END___ = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .dtors : {
    __DTOR_LIST__ = .;
@@ -141,99 +150,107 @@ SECTIONS
    KEEP (*(.dtors))
    __DTOR_END__ = .;
    ___DTORS_END___ = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .fixup : {
    __fixup_start = .;
    *(.fixup)
    __fixup_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .eh_frame : {
    *(.eh_frame)
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .eh_framehdr : {
    __eh_framehdr_start = .;
    *(.eh_framehdr)
    __eh_framehdr_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .gcc_except_table : {
    *(.gcc_except_table)
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .mmu_tbl (ALIGN(16384)) : {
    __mmu_tbl_start = .;
    *(.mmu_tbl)
    __mmu_tbl_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .ARM.exidx : {
    __exidx_start = .;
    *(.ARM.exidx*)
    *(.gnu.linkonce.armexidix.*.*)
    __exidx_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .preinit_array : {
    __preinit_array_start = .;
    KEEP (*(SORT(.preinit_array.*)))
    KEEP (*(.preinit_array))
    __preinit_array_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .init_array : {
    __init_array_start = .;
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array))
    __init_array_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .fini_array : {
    __fini_array_start = .;
    KEEP (*(SORT(.fini_array.*)))
    KEEP (*(.fini_array))
    __fini_array_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
+
+.drvcfg_sec : {
+    . = ALIGN(8);
+     __drvcfgsecdata_start = .;
+    KEEP (*(.drvcfg_sec))
+    __drvcfgsecdata_end = .;
+    __drvcfgsecdata_size = __drvcfgsecdata_end - __drvcfgsecdata_start;
+} > psu_r5_ddr_0_MEM_0
 
 .ARM.attributes : {
    __ARM.attributes_start = .;
    *(.ARM.attributes)
    __ARM.attributes_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .sdata : {
    __sdata_start = .;
    *(.sdata)
    *(.sdata.*)
    *(.gnu.linkonce.s.*)
    __sdata_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .sbss (NOLOAD) : {
    __sbss_start = .;
    *(.sbss)
    *(.sbss.*)
    *(.gnu.linkonce.sb.*)
    __sbss_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .tdata : {
    __tdata_start = .;
    *(.tdata)
    *(.tdata.*)
    *(.gnu.linkonce.td.*)
    __tdata_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .tbss : {
    __tbss_start = .;
    *(.tbss)
    *(.tbss.*)
    *(.gnu.linkonce.tb.*)
    __tbss_end = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .bss (NOLOAD) : {
    . = ALIGN(4);
@@ -260,7 +277,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
    . += _HEAP_SIZE;
    _heap_end = .;
    HeapLimit = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
 .stack (NOLOAD) : {
    . = ALIGN(16);
@@ -288,7 +305,7 @@ _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
    . += _UNDEF_STACK_SIZE;
    . = ALIGN(16);
    __undef_stack = .;
-} > psu_r5_btcm_MEM_0
+} > psu_r5_ddr_0_MEM_0
 
-_end = .;
+end = .;
 }