spec: Thread Context block (0x0011); format v1.1#1
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Add Section 5.7 specifying the Thread Context block payload (Tables 19a/19b): a per-thread register file (TID, scheduling state, optional name, and self-describing register entries with PC/SP/FP/flags role bits) so a consumer can reconstruct CPU state and emulate/step execution from a slice. Mark 0x0011 as specified (no longer reserved), add the producer conformance note, and align the document version to 1.1.0. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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Summary
Specifies the Thread Context block (
0x0011), previously reserved, so aslice can carry the per-thread CPU register file needed to emulate / step
execution from the snapshot.
Changes
id, scheduling state, optional name, and self-describing register entries
(lowercase mnemonic, width, and PC/SP/FP/flags role bits so a consumer can
locate them without architecture-specific knowledge).
0x0011removed from the "reserved" list (Table 11) and a producerconformance note added.
Notes
toolchain (my local pandoc dropped some math glyphs).
Implemented by the producer (memslicer) and a consumer (radare2 plugins);
see the companion PRs.