Support core TLB/IOTLB fixes from upstream

[nvax-r]

Support core TLB/IOTLB fixes from upstream

Description

This work adds TLB (Translation Lookaside Buffer) and IOTLB-adjacent fixes
and features to the nvidia-6.17 lineage on branch cxl_2026-03-18-richard, by
cherry-picking upstream commits from the Linux 6.17 → 6.19 window (and
closely related prerequisites). It is orthogonal to the branch’s primary
CXL bring-up: these patches target CPU MMU shootdown, IOMMU IOTLB,
GPU address-space TLB invalidation, KVM MMU, and observability.

Included areas:

• Intel drm/xe — GT TLB invalidation pipeline — Dependency jobs, ordered
  workqueues, GT-local TLB invalidation jobs, CT locking, VF post-migration TLB
  reset, PPGTT vs GGTT address choice for inval, bind/fence ordering, kerneldoc.
  (Michal Wajdeczko, Matthew Brost, Stuart Summers, Matthew Auld, Shuicheng Lin.)
• AMD drm/amdgpu — GFX12 MES INV_TLBS — MES API header, hardware TLB
  invalidation on gfx12, VM invalidation engine reservation for uni_mes, TLB
  fences on page-table updates, SI regression handling, flush_gpu_tlb_pasid()
  validation fixes. (Shaoyun Liu, Prike Liang, Michael Chen, Alex Deucher,
  Colin Ian King, Timur Kristóf.)
• arm64 + generic mm — huge PMD / write fault / TLBI — Elide unnecessary
  TLB flushes on some PTE protection transitions, spurious-fault repair for huge
  PMDs, avoid broadcast TLBI when a page is reused on write fault. (Dev Jain,
  Huang Ying.)
• x86/mm + mm — CPA, tracepoints, userfaultfd — Move tlb_flush trace
  event registration to x86; cpa_flush() → flush_kernel_range(); batch
  TLB flushes on UFFD MOVE for present pages. (Steven Rostedt, Yu-cheng Yu,
  Lokesh Gidra.)
• x86/mm/tlb trace + mm_types — Export TLB_REMOTE_WRONG_CPU for tracing;
  remove NR_TLB_FLUSH_REASONS from generic mm_types. (Tal Zussman.)
• mm/hugetlb + rmap — mmu_gather / IPI storm on PMD unshare — Reduce
  excessive IPI broadcasts when unsharing huge PMDs; follow-up hugetlb_pmd_shared
  / comment / hugetlb_reserve_pages() fixes. (David Hildenbrand, Shameer
  Kolothum.)
• s390/mm — TLB-related cleanup — Remove cpu_has_idte(), CSP→CSPG,
  unused flush_tlb(). (Heiko Carstens.)
• MIPS — host TLB — Avoid TLB shutdown on uniquification; kmalloc for
  tlb_vpn array. (Maciej W. Rozycki, Thomas Bogendoerfer.)
• Standalone fixes — Intel VT-d qi_desc_iotlb (Aashish Sharma); i915 TLB
  inval seqcount (Andi Shyti); KVM TDP MMU NX huge pages read lock (Vipin
  Sharma); LoongArch CSR_*TLB* entry addresses (Huacai Chen); powerpc 8xx
  DataStoreTLBMiss cleanup (Christophe Leroy); x86 switch_mm_irqs_off() SMP
  ordering (Ingo Molnar).

Key features (TLB impact):

• GPU device TLB / GTT / PPGTT invalidation is ordered, teardown-safe,
  and migration-aware (Xe, AMDGPU).
• Fewer unnecessary CPU TLB shootdowns and broadcast TLBI on arm64
  and hugetlb unshare paths.
• IOTLB descriptor hint correctness on Intel VT-d.
• SMP ordering fixes around context switch vs TLB flush on x86.
• Traceability of remote TLB flush behavior (TLB_REMOTE_WRONG_CPU).

---

Source

Patch breakdown (60 commits in scoped inventory — see appendix for SHAs):

#	Category	Count	Source
1	drm/xe — GT TLB invalidation, VF/fence/kerneldoc	25	Upstream linux (v6.17..v6.19; Intel drm/xe)
2	drm/amdgpu — MES INV_TLBS, uni_mes, PT TLB fences, validation	11	Upstream linux (AMD)
3	arm64/mm + mm — huge PMD / write fault / TLBI	3	Upstream linux
4	x86/mm + mm — CPA, tlb_flush trace event, userfaultfd	3	Upstream linux
5	x86/mm/tlb trace + mm_types	2	Upstream linux
6	mm/hugetlb + rmap — mmu_gather / IPI + follow-ups	5	Upstream linux
7	s390/mm	3	Upstream linux
8	MIPS	2	Upstream linux
9	Standalone (iommu vt-d, i915, kvm, LoongArch, powerpc, x86)	6	Upstream linux
	TOTAL	60

Notes on scope:

• Counts exclude non-TLB drm/xe commits on the same branch (workarounds,
  GuC, unrelated resets).
• 62 commits match a broad git log v6.17..branch grep for TLB keywords;
  the table above uses the deduplicated inventory (60) tied to the series
  below.

---

Patch list by series (branch SHAs, apply order top-to-bottom within each series)

Series A — drm/xe: GT TLB invalidation pipeline & bind/fence ordering

Order	Upstream SHA	Subject (abbrev.)
1	538b27a09af9	Make GGTT TLB invalidation failure message GT oriented
2	69f187d446c9	Add generic dependency jobs / scheduler
3	ada51219489f	Create ordered workqueue for GT TLB invalidation jobs
4	535c445eb94c	Add dependency scheduler for GT TLB invalidations to bind queues
5	dba89840a920	Add GT TLB invalidation jobs
6	b8d5779eee38	Use GT TLB invalidation jobs in PT layer
7	51330ba66caa	Remove unused GT TLB invalidation trace points
8	ce5059bf851b	Move explicit CT lock in TLB invalidation sequence
9	76186a253a4b	Cancel pending TLB inval workers on teardown
10	c697ddcf27bd	s/tlb_invalidation/tlb_inval
11	594bb930fc7d	Add xe_tlb_inval structure
12	6d1e452e0948	Add xe_gt_tlb_invalidation_done_handler
13	15366239e213	Decouple TLB invalidations from GT
14	9aff63cf3791	Prep TLB invalidation fence before sending
15	8443e8c448cf	Add helpers to send TLB invalidations
16	db16f9d90c1d	Split TLB invalidation code in frontend and backend
17	81a45cb7ea31	drm/xe/migrate: make MI_TLB_INVALIDATE conditional
18	489d890a3913	VF: Abort H2G sends during VF post-migration recovery
19	24687730cdc7	VF: Reset TLB invalidations during VF post migration recovery
20	673167d9f083	Use PPGTT addresses for TLB invalidation to avoid GGTT fixups
21	b2d7ec41f2a3	Attach last fence to TLB invalidation job queues
22	cb99e12ba8cb	Decouple bind queue last fence from TLB invalidations
23	ebb0880d4973	Skip TLB invalidation waits in page fault binds
24	904b2e5063af	Fix kerneldoc for xe_gt_tlb_inval_init_early
25	51cedb93da11	Fix kerneldoc for xe_tlb_inval_job_alloc_dep

Series B — drm/amdgpu: MES INV_TLBS, VM invalidation engine, PT TLB fences

Order	Upstream SHA	Subject (abbrev.)
1	e86a411b4293	Update MES v12 API header (INV_TLBS)
2	87e65052616c	Use INV_TLBS API for TLB invalidation on gfx12
3	4320fd9e0d81	Fix uint32_t field check (supporting fix)
4	85442bac8466	Fix MES version that supports inv_tlbs
5	8dbac5cf8bd5	Same (duplicate-style fix in history—verify you only need one)
6	873373739b9b	Reserve VM invalidation engine for uni_mes
7	f3854e04b708	Attach TLB fence to PTs update
8	820b3d376e8a	Don't attach TLB fence for SI
9	f4db9913e4d3	Validate flush_gpu_tlb_pasid()
10	9163fe4d790f	Revert "don't attach TLB fence for SI"
11	e3a6eff92bbd	Fix validating flush_gpu_tlb_pasid()

Series C — arm64 + generic mm: huge PMD / write fault / TLBI

Order	Upstream SHA	Subject (abbrev.)
1	c320dbb7c80d	arm64/mm: Elide TLB flush in certain PTE protection transitions
2	79301c7d605a	mm: Spurious fault fixing for huge PMD
3	cb1fa2e99955	arm64, tlbflush: Don't TLBI broadcast if page reused in write fault

Series D — x86/mm + mm: CPA flush, tracepoint home, userfaultfd batching

Order	Upstream SHA	Subject (abbrev.)
1	658fa653b4d1	Move tlb_flush trace event creation back to x86
2	86e6815b316e	cpa_flush() → flush_kernel_range() directly
3	50944692052b	userfaultfd: opportunistic TLB-flush batching (MOVE)

Series E — x86/mm/tlb trace + mm_types

Order	Upstream SHA	Subject (abbrev.)
1	8b62e64e6d30	Export TLB_REMOTE_WRONG_CPU in <trace/events/tlb.h>
2	0c01ea92f545	Remove tlb_flush_reason::NR_TLB_FLUSH_REASONS from <linux/mm_types.h>

Series F — mm/hugetlb + rmap: mmu_gather / IPI on PMD unshare

Order	Upstream SHA	Subject (abbrev.)
1	8ce720d5bd91	Fix excessive IPI broadcasts when unsharing PMD tables (mmu_gather)
2	ca1a47cd3f5f	Fix hugetlb_pmd_shared()
3	3937027caecb	Fix comments related to huge_pmd_unshare()
4	a8682d500f69	mm/rmap: fix comments related to huge_pmd_unshare()
5	9ee5d1766c8b	Fix incorrect error return from hugetlb_reserve_pages()

Series G — s390/mm

Order	Upstream SHA	Subject (abbrev.)
1	220d8e10d69a	Remove cpu_has_idte()
2	68807a894f0c	Replace CSP with CSPG
3	02310adcc621	Remove unused flush_tlb()

Series H — MIPS host TLB

Order	Upstream SHA	Subject (abbrev.)
1	9f048fa48740	Prevent TLB shutdown on initial uniquification
2	841ecc979b18	kmalloc tlb_vpn array to avoid stack overflow

Standalone patches

#	Upstream SHA	Author (upstream)	Subject (abbrev.)
I	6b38a108eeb3	Aashish Sharma	iommu/vt-d: Fix unused invalidation hint in qi_desc_iotlb
II	3bcf7894a93e	Andi Shyti	drm/i915/gt: Use standard API for seqcount read in TLB invalidation
III	a57750909580	Vipin Sharma	KVM: TDP MMU NX huge pages (MMU read lock)
IV	4e67526840fc	Huacai Chen	LoongArch: CSR_MERRENTRY / CSR_TLBRENTRY physical addresses
V	d9e46de4bf5c	Christophe Leroy	powerpc/8xx: DataStoreTLBMiss handler cleanup
VI	83b0177a6c48	Ingo Molnar	x86/mm: switch_mm_irqs_off() SMP ordering

---

Appendix B — Quick reference: series authors

Series	Primary upstream authors
A drm/xe	Michal Wajdeczko, Matthew Brost, Stuart Summers, Matthew Auld, Shuicheng Lin
B drm/amdgpu	Shaoyun Liu, Prike Liang, Michael Chen, Alex Deucher, Colin Ian King, Timur Kristóf
C arm64 + mm	Dev Jain, Huang Ying
D x86/mm + uffd	Steven Rostedt, Yu-cheng Yu, Lokesh Gidra
E trace + mm_types	Tal Zussman
F hugetlb / rmap	David Hildenbrand, Shameer Kolothum
G s390/mm	Heiko Carstens
H MIPS	Maciej W. Rozycki, Thomas Bogendoerfer
Standalone	Aashish Sharma, Andi Shyti, Vipin Sharma, Huacai Chen, Christophe Leroy, Ingo Molnar

---