Add estimate power command to dynamatic#655
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shundroid
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Thank you for adding this feature!
| # Run synthesis | ||
| synth_design -top $TOP_DESIGN -part xc7k160tfbg484-1 -no_iobuf -mode out_of_context -flatten_hierarchy none |
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Do we need to run the synthesis again? I think it's better to use write_checkpoint and read_checkpoint commands if possible:
syntax:
write_checkpoint -force $DIR/impl.dcp
(read_checkpoint: I've never tried)
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the -flatten_hierarchy none flag means that this synthesis run produces different results to the normal synthesis script (poorer results, but it allows the switching activity annotation)
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I wanted to mention the duplication with the synthesis for power estimation, I think it also has the flatten_hierarchy option:
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ah, possibly! but we are currently only running synthesis once (some of the simulations were hanging with the double synth option).
I should investigate it though!
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ah, possibly! but we are currently only running synthesis once (some of the simulations were hanging with the double synth option).
I should investigate it though!
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| vhdl_src_folder = os.path.join(output_dir, "hdl") | ||
| if not os.path.exists(vhdl_src_folder): | ||
| print(f"[ERROR] {vhdl_src_folder} not found. Please run the 'write-hdl' command") | ||
| return | ||
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| tb_file = os.path.join(output_dir, "sim", "HDL_SRC", f"tb_{kernel_name}.vhd") | ||
| if not os.path.exists(tb_file): | ||
| print(f"[ERROR] {tb_file} not found. Please run the 'simulate' command") | ||
| return |
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@shundroid switched so the vhdl files are from the hdl folder, and we pull just the tb file from the sim folder
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