This is Simple 8-bit single-cycle processor which includes an ALU, a register file and control logic with a memory sub-system which includes Data Cache and Memory ,Instruction Cache and Memory using Verilog HDL. This is done as Project for CO224 Computer Architecture Course in 3rd year Department of Computer Engineering UOP.
The microarchitecture of a processor is designed based on an Instruction Set. Processor implement with the instructions add, sub, and, or, mov, loadi, j and beq. All instructions are of 32-bit fixed length.
For Memory-Hierarchy System, I use separate memory devices (known as Harvard architecture).
- ALU
- Register File
- Integration & Control
- Data Memory
- Data Cache
- Instruction Memory
- Instruction Cache