██╗ ██╗ █████╗ ██████╗ ███████╗██╗ ██╗ █████╗
██║ ██║██╔══██╗██╔══██╗██╔════╝██║ ██║██╔══██╗
███████║███████║██████╔╝███████╗███████║███████║
██╔══██║██╔══██║██╔══██╗╚════██║██╔══██║██╔══██║
██║ ██║██║ ██║██║ ██║███████║██║ ██║██║ ██║
╚═╝ ╚═╝╚═╝ ╚═╝╚═╝ ╚═╝╚══════╝╚═╝ ╚═╝╚═╝ ╚═╝
class HarshaVardhan:
def __init__(self):
self.name = "Harsha Vardhan"
self.university = "KL University"
self.degree = "B.Tech ECE"
self.focus = ["VLSI Design", "ASIC", "Semiconductors"]
self.languages = ["Python", "C", "Verilog"]
self.tools = ["Cadence", "Synopsys", "Django", "React"]
self.exploring = "ML + Hardware + Full Stack"
self.goal = "Build at the intersection of Hardware & AI 🚀"
self.streak = "307 contributions and growing 🔥"
def current_status(self):
return "Turning silicon into intelligence ⚡"| 🔹 Domain | 🛠️ Tools / Skills |
|---|---|
| VLSI & Digital Design | Cadence, Synopsys, Verilog HDL, ASIC |
| Embedded Systems | ESP32, Sensors, IoT Protocols |
| Full Stack Dev | Django, Python, React, Tailwind CSS |
| Machine Learning | Python, NumPy, Scikit-learn |
| Circuit Design | Analog + Digital Electronics |
| 🏷️ Repo | 📝 Description | 🛠️ Stack |
|---|---|---|
| Python-Full-Stack-Development | Student Activity Management System | Django · Python |
| KL-University-BTech-ECE-Resources | BTech resources — notes, PPTs, topics | Jupyter · MATLAB |
| Harsha-Python-Full-Stack-Devlopment-Project | Django MVT full stack web app | Django · HTML |
| harsha-portfolio-2026 | Personal portfolio website | TypeScript · React |
| EC9036_ASIC_DESIGN_USING_HDL | ASIC design course documents | Verilog |
| Quant-Resources | Resources for Quantitative Developers | C++ · Guides |
[ ✅ ] Build complete BTech ECE resource repository
[ ✅ ] Launch personal portfolio on Vercel
[ ✅ ] Build Django full stack web application
[ ✅ ] 300+ GitHub contributions
[ 🔄 ] Master Cadence & Synopsys design flow
[ 🔄 ] Complete VLSI project from RTL → GDSII
[ ⏳ ] Publish research / technical blog
[ ⏳ ] Open-source an ML + Hardware project
[ ⏳ ] Land VLSI / Semiconductor internship
Harsha Vardhan — BTech ECE @ KL University
"I enjoy building projects that bridge hardware and software — especially where VLSI meets AI. The future is written in silicon." 🔬
