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Pull Request Overview
Expands FET package support by adding PowerSO8 and DFN5x6 package variants to the JLC parts table. The change maps various naming conventions for these packages to a standardized footprint and updates the pinout mapping to support the generic PQFN footprint.
- Added 19 new package name mappings for PowerSO8/DFN5x6 FET variants
- Updated pinout definition to support the generic PQFN-8-EP_6x5mm_P1.27mm footprint
- Mapped all package variants to the same generic footprint for compatibility
Reviewed Changes
Copilot reviewed 2 out of 2 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| edg/parts/JlcFet.py | Adds package name mappings for PowerSO8/DFN5x6 variants to the PACKAGE_FOOTPRINT_MAP |
| edg/abstract_parts/AbstractFets.py | Updates pinout mapping to support both PowerPAK_SO-8_Single and PQFN-8-EP_6x5mm_P1.27mm_Generic footprints |
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| ( | ||
| 'Package_SO:PowerPAK_SO-8_Single', | ||
| 'Package_DFN_QFN:PQFN-8-EP_6x5mm_P1.27mm_Generic', | ||
| ): lambda block: { |
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Using a tuple as a dictionary key for multiple footprints reduces readability and maintainability. Consider using separate dictionary entries for each footprint to make the mapping more explicit and easier to understand.
Add PowerSO8 / DFN5x6 FET pinnings using the generic footprint and add package names for JLC parts tables. The naming is a mess, but the all should be compatible packages.
Note that there are so few of these in the JLC table that they do not get picked in practice in any of the examples.