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Fix: replace the crystal to 32MHz according to the ref design #417

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Merged
Suke0811 merged 1 commit into from
Jul 1, 2025
Merged

Fix: replace the crystal to 32MHz according to the ref design #417

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2 changes: 1 addition & 1 deletion edg/parts/Rf_Sx1262.py
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Original file line number Diff line number Diff line change
Expand Up @@ -247,7 +247,7 @@ def contents(self) -> None:
with self.implicit_connect(
ImplicitConnect(self.gnd, [Common])
) as imp:
self.xtal = imp.Block(Crystal(30*MHertz(tol=30e-6))) # 30ppm for LoRaWAN systems
self.xtal = imp.Block(Crystal(32*MHertz(tol=30e-6))) # 30ppm for LoRaWAN systems
self.connect(self.xtal.crystal, self.ic.xtal)

self.vreg_cap = imp.Block(DecouplingCapacitor(470*nFarad(tol=0.2))).connected(pwr=self.ic.vreg)
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