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1. CNN-Accelerator CNN-Accelerator Public

   Building a CNN inference accelerator on Xilinx KV260, using a custom weight-stationary compute engine with sliding window convolution dataflow on variable-size 16-bit fixed-point arrays. Targeting …

   SystemVerilog 1

2. FPGA-Conway FPGA-Conway Public

   FPGA implementation of conway's game of life on a basys3 FPGA. Displaying vga output at 640 x 480 resolution.

   SystemVerilog 6

3. UART-Integrated-16-bit-ALU-System UART-Integrated-16-bit-ALU-System Public

   FPGA/VHDL implementation of a modular UART-integrated 16-bit ALU system with FSM-driven transmitter/receiver, configurable baudrate, and synchronous RAM storage.

   VHDL