Board-aware weight-streaming + capacity-regime memory models + weight-manifest generator#90

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feat/board-memory-regimes

Commits on Jun 4, 2026

feat(emulator): weight-streaming memory models (HostStream + LayerSwapping) wired into --memory-model
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feat(profiler): charge DDR3 H_PREFETCH/H_STORE latency from board config memory cycles
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feat(emulator): surface streaming-model statistics through ErasedMemoryModel
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fix(emulator): address code-review findings on the streaming models
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feat(boards): rename nexys_a7 -> nexys_video (USB-only) + add custom_a7 (PCIe Gen2 x4)
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feat(emulator): capacity-aware memory model with resident / kv-swap / weight-stream regimes
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feat(testbench): kind-tagged weight-manifest generator from real compiles
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chore: keep streaming/profile working docs local-only (doc/_local)
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feat(testbench): apply the selected board's latency to the emulator
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chore(boards): align Artix-7 vector/systolic latencies to synthesized RTL
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