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Design-for-Security-Assignments


Group members

  1. Anurag Kamal(22111010 , akamal22@iitk.ac.in)
  2. Ashitosh More (21111017, ashitoshvm21@iitk.ac.in)
  3. Shivam Kharwar (21111058, skharwar21@iitk.ac.in)

Tools :
1)Xilinx Vivado(for synthesis and analysis of hardware description language designs,
superseding Xilinx ISE with additional features for system on a chip development and high-level synthesis)
2) Google Colab

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CS669A Design For Security Assignments

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  • VHDL 86.5%
  • Verilog 12.3%
  • Other 1.2%