Some of the implemented aarch64 instructions have not been tested. At least the following instructions have not been tested.
USHR <Vd>.<T>, <Vn>.<T>, #<shift>
ADC <Xd>, <Xn>, <Xm>
UMSUBL <Xd>, <Wn>, <Wm>, <Xa>
FSUB <Vd>.<T>, <Vn>.<T>, <Vm>.<T>
FDIV <Vd>.<T>, <Vn>.<T>, <Vm>.<T> (only 32bit or 64bit)
FCSEL <Dd>, <Dn>, <Dm>, <cond>
UCVTF <V><d>, <V><n> (<V> = S)
UCVTF <V><d>, <V><n> (<V> = D)
SCVTF <V><d>, <V><n> (<V> = S)
SCVTF <V><d>, <V><n> (<V> = D)
FRINTA <Dd>, <Dn>
FCVTAS <Xd>, <Dn>
Some of the implemented aarch64 instructions have not been tested. At least the following instructions have not been tested.